BNEZ	X6, 3(PC);	\
	/* return NaN if x is NaN */; \
	MOVD	F0, ret+8(FP); 	\
	RET;			\
	MOV	$PosInf, X6;	\
	FMVDX	X6, F1;		\
	FABSD	F0, F2;		\
	/* if abs(x) > +Inf, return Inf instead of round(x) */; \
	FLTD	F1, F2, X6;	\
	/* Inf should keep same signed with x then return */;	\
	BEQZ	X6, 3(PC); \
	FCVTLD.MODE	F0, X6;	\
	FCVTDL	X6, F1;		\
	/* rounding will drop signed bit in RISCV, restore it */; \
	FSGNJD	F0, F1, F0;	\

	"FCVTLD",
	"FCVTDW",
	"FCVTDL",
	"FCVTWUD",
	"FCVTLUD",
	"FCVTDWU",
	"FCVTDLU",
	"FCVTSD",
	"FCVTDS",
	"FSGNJD",
	"FSGNJND",
	"FSGNJXD",
	"FMVXD",
	"FMVDX",
	"FEQD",
	"FLTD",
	"FLED",
	"FCLASSD",
	"FLQ",
	"FSQ",
	"FADDQ",
	"FSUBQ",
	"FMULQ",
	"FDIVQ",
	"FMINQ",
	"FMAXQ",
	"FSQRTQ",
	"FMADDQ",
	"FMSUBQ",
	"FNMADDQ",
	"FNMSUBQ",
	"FCVTWQ",