VPERM	V3,V3,SWAP,V3
	VPERM	V4,V4,SWAP,V4
#endif

	MFVSRD	VS35,R16	// move upper doublewords of A and B into GPR for comparison
	MFVSRD	VS36,R10

	CMPU	R16,R10
	BEQ	lower
	SETB_CR0_NE(R3)
	RET

	PCALIGN $16
lower:
	VSLDOI	$8,V3,V3,V3	// move lower doublewords of A and B into GPR for comparison
	MFVSRD	VS35,R16
	VSLDOI	$8,V4,V4,V4
	MFVSRD	VS36,R10

	CMPU	R16,R10
	SETB_CR0_NE(R3)
	RET

	VADDUDM	V0, V4, V4	// Accumulate the popcounts. They are 8x the count.
	VADDUDM	V2, V5, V5	// The count will be fixed up afterwards.
	ADD	$32, R3
	BDNZ	cmploop

	VADDUDM	V4, V5, V5
	MFVSRD	V5, R18
	VSLDOI	$8, V5, V5, V5
	MFVSRD	V5, R21
	ADD	R21, R18, R18
	ANDCC	$31, R4, R4
	// Skip the tail processing if no bytes remaining.
	BEQ	tail_0

#ifdef GOPPC64_power10

	"U16CON",
	"16CON",
	"U31CON",
	"S32CON",
	"U32CON",
	"32CON",
	"S34CON",
	"64CON",
	"SACON",
	"LACON",
	"DACON",
	"BRA",
	"BRAPIC",
	"ZOREG",
	"SOREG",
	"LOREG",
	"XOREG",
	"FPSCR",
	"LR",
	"CTR",
	"ANY",
	"GOK",
	"ADDR",
	"TLS_LE",
	"TLS_IE",
	"TEXTSIZE",
	"NCLASS",

	FMOVD F25, 456(R1)
	FMOVD F26, 464(R1)
	FMOVD F27, 472(R1)
	FMOVD F28, 480(R1)
	FMOVD F29, 488(R1)
	FMOVD F30, 496(R1)
	FMOVD F31, 504(R1)
	MOVFL FPSCR, F0
	FMOVD F0, 512(R1)
	CALL ·asyncPreempt2(SB)
	FMOVD 512(R1), F0
	MOVFL F0, FPSCR
	FMOVD 504(R1), F31
	FMOVD 496(R1), F30
	FMOVD 488(R1), F29
	FMOVD 480(R1), F28
	FMOVD 472(R1), F27
	FMOVD 464(R1), F26
	FMOVD 456(R1), F25
	FMOVD 448(R1), F24

func (c *sigctxt) link() uint64   { return c.regs().lr }
func (c *sigctxt) xer() uint32    { return c.regs().xer }
func (c *sigctxt) ccr() uint32    { return c.regs().cr }
func (c *sigctxt) fpscr() uint32  { return c.regs().fpscr }
func (c *sigctxt) fpscrx() uint32 { return c.regs().fpscrx }

// TODO(aix): find trap equivalent
func (c *sigctxt) trap() uint32 { return 0x0 }

	__pad          int32
}

type context64 struct {
	gpr        [32]uint64
	msr        uint64
	iar        uint64
	lr         uint64
	ctr        uint64
	cr         uint32
	xer        uint32
	fpscr      uint32
	fpscrx     uint32
	except     [1]uint64
	fpr        [32]float64
	fpeu       uint8
	fpinfo     uint8
	fpscr24_31 uint8
	pad        [1]uint8
	excp_type  int32
}

	"LXVX",
	"LXVDSX",
	"STXV",
	"STXVL",
	"STXVLL",
	"STXVD2X",
	"STXVW4X",
	"STXVH8X",
	"STXVB16X",
	"STXVX",
	"LXSDX",
	"STXSDX",
	"LXSIWAX",
	"LXSIWZX",
	"STXSIWX",
	"MFVSRD",
	"MFFPRD",
	"MFVRD",
	"MFVSRWZ",
	"MFVSRLD",
	"MTVSRD",
	"MTFPRD",
	"MTVRD",
	"MTVSRWA",
	"MTVSRWZ",
	"MTVSRDD",
	"MTVSRWS",
	"XXLAND",
	"XXLANDC",
	"XXLEQV",

	r7           uint32
	r8           uint32
	r9           uint32
	r10          uint32
	r11          uint32
	r12          uint32

	spr  uint32
	lrr  uint32
	pc   uint32
	cpsr uint32

	fpscr   uint32
	padding uint32

	floatNeon [16]neon128

	bvr      [8]uint32
	bcr      [8]uint32
	wvr      [1]uint32
	wcr      [1]uint32
	padding2 [2]uint32
}

	//	}
	MOVD	F1, foo<>+3(SB)
	MOVD	F1, 16(R2)
	MOVD	F1, (R2)

	//
	// floating point status
	//
	//	LMOVW fpscr ',' freg
	//	{
	//		outcode(int($1), &$2, 0, &$4);
	//	}
	MOVW	FCR0, R1

	//	LMOVW freg ','  fpscr
	//	{
	//		outcode(int($1), &$2, 0, &$4);
	//	}
	MOVW	R1, FCR0

	//	LMOVW rreg ',' mreg
	//	{
	//		outcode(int($1), &$2, 0, &$4);
	//	}

 * callee-save, so they must be saved explicitly.
 */
.globl crosscall_ppc64
crosscall_ppc64:
	// Start with standard C stack frame layout and linkage
	mflr	%r0
	std	%r0, 16(%r1)	// Save LR in caller's frame
	mfcr	%r0
	std	%r0, 8(%r1)	// Save CR in caller's frame
	stdu	%r1, -FRAME_SIZE(%r1)
	std	%r2, 24(%r1)

	FOR_EACH_GPR std
	FOR_EACH_FPR stfd
	FOR_EACH_VR stvx

	// Set up Go ABI constant registers
	li	%r0, 0