MOVF F24, 212(R29)
	MOVF F25, 216(R29)
	MOVF F26, 220(R29)
	MOVF F27, 224(R29)
	MOVF F28, 228(R29)
	MOVF F29, 232(R29)
	MOVF F30, 236(R29)
	MOVF F31, 240(R29)
	#endif
	CALL ·asyncPreempt2(SB)
	#ifndef GOMIPS_softfloat
	MOVF 240(R29), F31
	MOVF 236(R29), F30
	MOVF 232(R29), F29
	MOVF 228(R29), F28
	MOVF 224(R29), F27
	MOVF 220(R29), F26
	MOVF 216(R29), F25
	MOVF 212(R29), F24
	MOVF 208(R29), F23

	FRINTNS F26, F14                           // 4e43241e
	FRINTND F28, F12                           // 8c43641e
	//TODO VFRINTP V27.D2, V31.D2              // 7f8be14e
	FRINTPS F27, F4                            // 64c3241e
	FRINTPD F6, F22                            // d6c0641e
	//TODO VFRINTX V25.D2, V0.D2               // 209b616e
	FRINTXS F26, F10                           // 4a43271e

	FMOVD	F20, (offset+8*6)(R1)  \
	FMOVD	F21, (offset+8*7)(R1)  \
	FMOVD	F22, (offset+8*8)(R1)  \
	FMOVD	F23, (offset+8*9)(R1)  \
	FMOVD	F24, (offset+8*10)(R1) \
	FMOVD	F25, (offset+8*11)(R1) \
	FMOVD	F26, (offset+8*12)(R1) \
	FMOVD	F27, (offset+8*13)(R1) \
	FMOVD	F28, (offset+8*14)(R1) \
	FMOVD	F29, (offset+8*15)(R1) \
	FMOVD	F30, (offset+8*16)(R1) \
	FMOVD	F31, (offset+8*17)(R1)

	MOVF	F9, (14*8)(X2)
	MOVF	F18, (15*8)(X2)
	MOVF	F19, (16*8)(X2)
	MOVF	F20, (17*8)(X2)
	MOVF	F21, (18*8)(X2)
	MOVF	F22, (19*8)(X2)
	MOVF	F23, (20*8)(X2)
	MOVF	F24, (21*8)(X2)
	MOVF	F25, (22*8)(X2)
	MOVF	F26, (23*8)(X2)
	MOVF	F27, (24*8)(X2)

	MOV	m_g0(X10), g
	CALL	runtime·save_g(SB)

	CALL	runtime·mstart(SB)

	// Restore callee-save registers.
	MOV	(1*8)(X2), X8
	MOV	(2*8)(X2), X9
	MOV	(3*8)(X2), X18

(5) FCCMPD, FCCMPS, FCCMPED, FCCMPES <cond>, Fm. Fn, $<nzcv>

Examples:

	FCCMPD AL, F8, F26, $0     <=>    fccmp d26, d8, #0x0, al
	FCCMPS VS, F29, F4, $4     <=>    fccmp s4, s29, #0x4, vs
	FCCMPED LE, F20, F5, $13   <=>    fccmpe d5, d20, #0xd, le
	FCCMPES NE, F26, F10, $0   <=>    fccmpe s10, s26, #0x0, ne

(6) CCMN, CCMNW, CCMP, CCMPW <cond>, <Rn>, $<imm>, $<nzcv>

Examples:

	F0
	F1
	F2
	F3
	F4
	F5
	F6
	F7
	F8
	F9
	F10
	F11
	F12
	F13
	F14
	F15
	F16
	F17
	F18
	F19
	F20
	F21
	F22
	F23
	F24
	F25
	F26
	F27
	F28
	F29
	F30
	F31
	V0 // VSX extension, F0 is V0[0:63].
	V1
	V2
	V3
	V4
	V5
	V6
	V7
	V8
	V9
	V10
	V11
	V12
	V13
	V14
	V15
	V16

	"F6",
	"F7",
	"F8",
	"F9",
	"F10",
	"F11",
	"F12",
	"F13",
	"F14",
	"F15",

	"F16",
	"F17",
	"F18",
	"F19",
	"F20",
	"F21",
	"F22",
	"F23",
	"F24",
	"F25",
	"F26",
	"F27",
	"F28",
	"F29",
	"F30",
	"F31",

	"SP",
	"g",

	// pseudo-registers
	"SB",
}

func init() {
	// Make map from reg names to reg integers.
	if len(regNamesWasm) > 64 {

 *
 * compiler allocates R3 up as temps
 * compiler allocates register variables R7-R27
 * compiler allocates external registers R30 down
 *
 * compiler allocates register variables F17-F26
 * compiler allocates external registers F26 down
 */
const (
	BIG = 32768 - 8
)

const (
	/* mark flags */
	LABEL    = 1 << 0
	LEAF     = 1 << 1
	FLOAT    = 1 << 2
	BRANCH   = 1 << 3
	LOAD     = 1 << 4

//
// compiler allocates R0 up as temps
// compiler allocates register variables R7-R25
// compiler allocates external registers R26 down
//
// compiler allocates register variables F7-F26
// compiler allocates external registers F26 down
const (
	REGMIN = REG_R7  // register variables allocated from here to REGMAX
	REGRT1 = REG_R16 // ARM64 IP0, external linker may use as a scratch register in trampoline

	return p
}
func f25() []string {
	return []string{"abc", "def", "ghi"} // no write barrier here
}

type T26 struct {
	a, b, c int
	d, e, f *int
}

var g26 int

func f26(p *int) *T26 { // see issue 29573
	return &T26{
		a: 5,
		b: 6,
		c: 7,
		d: &g26, // no write barrier: global ptr
		e: nil,  // no write barrier: nil ptr
		f: p,    // ERROR "write barrier"
	}
}