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Results 11 - 20 of 95 for vmov (0.04 sec)
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src/cmd/asm/internal/asm/testdata/arm64error.s
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Dec 08 03:28:17 UTC 2023 - 37.8K bytes - Viewed (0) -
src/internal/bytealg/equal_arm64.s
VCMEQ V1.D2, V5.D2, V9.D2 VCMEQ V2.D2, V6.D2, V10.D2 VCMEQ V3.D2, V7.D2, V11.D2 VAND V8.B16, V9.B16, V8.B16 VAND V8.B16, V10.B16, V8.B16 VAND V8.B16, V11.B16, V8.B16 CMP R0, R6 VMOV V8.D[0], R4 VMOV V8.D[1], R5 CBZ R4, not_equal CBZ R5, not_equal BNE chunk64_loop AND $0x3f, R2, R2 CBZ R2, equal chunk16: // work with 16-byte chunks BIC $0xf, R2, R3 CBZ R3, tail
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Jan 24 16:07:25 UTC 2024 - 2.5K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/arm64enc.s
VMOV V18.B[10], V27 // 5b06155e VDUP V18.B[10], V27 // 5b06155e VMOV V12.B[2], V28.B[12] // 9c15196e VMOV R30, V4.B[13] // c41f1b4e VMOV V2.B16, V4.B16 // 441ca24e
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Jul 24 01:11:41 UTC 2023 - 43.9K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/arch/arm/armasm/tables.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Aug 16 17:57:48 UTC 2017 - 267.4K bytes - Viewed (0) -
src/cmd/internal/obj/arm64/anames.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 18 01:40:37 UTC 2023 - 5.4K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/arch/arm/armasm/plan9x.go
{VCMP_E_EQ_F64, []int{1, 0}, "VCMP.E", "CMPD"}, {VLDR_EQ, []int{1}, "VLDR", "MOV"}, {VSTR_EQ, []int{1}, "VSTR", "MOV"}, {VMOV_EQ_F32, []int{1, 0}, "VMOV", "MOVF"}, {VMOV_EQ_F64, []int{1, 0}, "VMOV", "MOVD"}, {VMOV_EQ_32, []int{1, 0}, "VMOV", "MOVW"}, {VMOV_EQ, []int{1, 0}, "VMOV", "MOVW"}, {VCVT_EQ_F64_F32, []int{1, 0}, "VCVT", "MOVFD"}, {VCVT_EQ_F32_F64, []int{1, 0}, "VCVT", "MOVDF"},
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 19 23:33:33 UTC 2023 - 11.9K bytes - Viewed (0) -
src/cmd/internal/obj/arm64/doc.go
RET 7. Move large constants to vector registers. Go asm uses VMOVQ/VMOVD/VMOVS to move 128-bit, 64-bit and 32-bit constants into vector registers, respectively. And for a 128-bit integer, it take two 64-bit operands, for the low and high parts separately. Examples: VMOVS $0x11223344, V0 VMOVD $0x1122334455667788, V1 VMOVQ $0x1122334455667788, $0x99aabbccddeeff00, V2 // V2=0x99aabbccddeeff001122334455667788
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Aug 07 00:21:42 UTC 2023 - 9.6K bytes - Viewed (0) -
src/crypto/sha256/sha256block_amd64.s
rounds12to59 (m0,4,m3,m1,sha256msg1,vmov) // 16-19 rounds12to59 (m1,5,m0,m2,sha256msg1,vmov) // 20-23 rounds12to59 (m2,6,m1,m3,sha256msg1,vmov) // 24-27 rounds12to59 (m3,7,m2,m0,sha256msg1,vmov) // 28-31 rounds12to59 (m0,8,m3,m1,sha256msg1,vmov) // 32-35 rounds12to59 (m1,9,m0,m2,sha256msg1,vmov) // 36-39 rounds12to59 (m2,10,m1,m3,sha256msg1,vmov) // 40-43
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 47.3K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/arch/arm64/arm64asm/plan9x.go
regno := uint16(r) & 31 return fmt.Sprintf("JMP (R%d)", regno) case MOV: rno := -1 switch a := inst.Args[0].(type) { case Reg: rno = int(a) case RegSP: rno = int(a) case RegisterWithArrangementAndIndex: op = "VMOV" case RegisterWithArrangement: op = "VMOV" } if rno >= 0 && rno <= int(WZR) { op = "MOVW"
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon May 16 22:24:28 UTC 2022 - 17K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/arm64.s
FMOVD F4, (R2)(R6<<3) // 447826fc // vmov VMOV V8.S[1], R1 // 013d0c0e VMOV V0.D[0], R11 // 0b3c084e VMOV V0.D[1], R11 // 0b3c184e VMOV R20, V1.S[0] // 811e044e VMOV R20, V1.S[1] // 811e0c4e VMOV R1, V9.H4 // 290c020e VDUP R1, V9.H4 // 290c020e VMOV R22, V11.D2 // cb0e084e VDUP R22, V11.D2 // cb0e084e
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Dec 08 03:28:17 UTC 2023 - 94.9K bytes - Viewed (0)