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Results 1 - 10 of 33 for BX (0.05 seconds)

  1. src/cmd/asm/internal/asm/testdata/386.s

    	DIVB	foo+4(SB)
    	PUSHL	$foo+4(SB)
    	POPL		AX
    
    // LTYPE3 rimrem	{ outcode(int($1), &$2); }
    	SUBB	$1, AX
    	SUBB	$1, foo+4(SB)
    	SUBB	BX, AX
    	SUBB	BX, foo+4(SB)
    
    // LTYPE4 remrim	{ outcode(int($1), &$2); }
    	CMPB	AX, $1
    	CMPB	foo+4(SB), $4
    	CMPB	BX, AX
    	CMPB	foo+4(SB), BX
    
    // LTYPER nonrel	{ outcode(int($1), &$2); }
    label:
    	JC	label // JCS
    	JC	-1(PC) // JCS -1(PC)
    
    // LTYPEC spec3	{ outcode(int($1), &$2); }
    Created: Tue Apr 07 11:13:11 GMT 2026
    - Last Modified: Tue Apr 09 18:57:21 GMT 2019
    - 2K bytes
    - Click Count (0)
  2. src/cmd/asm/internal/asm/testdata/amd64enc.s

    	ADCQ (BX), DX                           // 481313
    	ADCQ (R11), DX                          // 491313
    	ADCQ (BX), R11                          // 4c131b
    	ADCQ (R11), R11                         // 4d131b
    	ADCB (BX), DL                           // 1213
    	ADCB (R11), DL                          // 411213
    	ADCB (BX), R11                          // 44121b
    	ADCB (R11), R11                         // 45121b
    Created: Tue Apr 07 11:13:11 GMT 2026
    - Last Modified: Fri Oct 08 21:38:44 GMT 2021
    - 581.9K bytes
    - Click Count (1)
  3. src/cmd/asm/internal/asm/operand_test.go

    	{"(BP)(DX*4)", "(BP)(DX*4)"},
    	{"(BP)(R8*4)", "(BP)(R8*4)"},
    	{"(BX)", "(BX)"},
    	{"(DI)", "(DI)"},
    	{"(DI)(BX*1)", "(DI)(BX*1)"},
    	{"(DX)", "(DX)"},
    	{"(R9)", "(R9)"},
    	{"(R9)(BX*8)", "(R9)(BX*8)"},
    	{"(SI)", "(SI)"},
    	{"(SI)(BX*1)", "(SI)(BX*1)"},
    	{"(SI)(DX*1)", "(SI)(DX*1)"},
    	{"(SP)", "(SP)"},
    	{"(SP)(AX*4)", "(SP)(AX*4)"},
    	{"32(SP)(BX*2)", "32(SP)(BX*2)"},
    	{"32323(SP)(R8*4)", "32323(SP)(R8*4)"},
    Created: Tue Apr 07 11:13:11 GMT 2026
    - Last Modified: Tue Aug 29 18:31:05 GMT 2023
    - 23.9K bytes
    - Click Count (0)
  4. src/cmd/asm/internal/asm/testdata/amd64error.s

    	// CLWB instructions:
    	CLWB BX                          // ERROR "invalid instruction"
    	// CLDEMOTE instructions:
    	CLDEMOTE BX                      // ERROR "invalid instruction"
    	// WAITPKG instructions:
    	TPAUSE (BX)                      // ERROR "invalid instruction"
    	UMONITOR (BX)                    // ERROR "invalid instruction"
    	UMWAIT (BX)                      // ERROR "invalid instruction"
    Created: Tue Apr 07 11:13:11 GMT 2026
    - Last Modified: Wed Jun 14 00:03:57 GMT 2023
    - 8.9K bytes
    - Click Count (0)
  5. lib/fips140/v1.0.0-c2097c7c.zip

    X4 AESENCLAST X0, X5 AESENCLAST X0, X6 AESENCLAST X0, X7 AESENCLAST X0, X8 MOVUPS (BX), X0 PXOR X1, X0 MOVUPS X0, (DX) MOVUPS 16(BX), X0 PXOR X2, X0 MOVUPS X0, 16(DX) MOVUPS 32(BX), X0 PXOR X3, X0 MOVUPS X0, 32(DX) MOVUPS 48(BX), X0 PXOR X4, X0 MOVUPS X0, 48(DX) MOVUPS 64(BX), X0 PXOR X5, X0 MOVUPS X0, 64(DX) MOVUPS 80(BX), X0 PXOR X6, X0 MOVUPS X0, 80(DX) MOVUPS 96(BX), X0 PXOR X7, X0 MOVUPS X0, 96(DX) MOVUPS 112(BX), X0 PXOR X8, X0 MOVUPS X0, 112(DX) RET golang.org/fips140@v1.0.0-c2097c7c/fips14...
    Created: Tue Apr 07 11:13:11 GMT 2026
    - Last Modified: Thu Sep 25 19:53:19 GMT 2025
    - 642.7K bytes
    - Click Count (0)
  6. src/cmd/asm/internal/asm/testdata/avx512enc/vpclmulqdq_avx512f.s

    	VPCLMULQDQ $97, 15(DX)(BX*8), Z0, Z12              // 62737d4844a4da0f00000061 or 6273fd4844a4da0f00000061
    	VPCLMULQDQ $97, Z9, Z26, Z12                       // 62532d4044e161 or 6253ad4044e161
    	VPCLMULQDQ $97, Z3, Z26, Z12                       // 62732d4044e361 or 6273ad4044e361
    	VPCLMULQDQ $97, 7(SI)(DI*1), Z26, Z12              // 62732d4044a43e0700000061 or 6273ad4044a43e0700000061
    Created: Tue Apr 07 11:13:11 GMT 2026
    - Last Modified: Tue May 22 14:57:15 GMT 2018
    - 8.2K bytes
    - Click Count (0)
  7. lib/fips140/v1.26.0.zip

    X4 AESENCLAST X0, X5 AESENCLAST X0, X6 AESENCLAST X0, X7 AESENCLAST X0, X8 MOVUPS (BX), X0 PXOR X1, X0 MOVUPS X0, (DX) MOVUPS 16(BX), X0 PXOR X2, X0 MOVUPS X0, 16(DX) MOVUPS 32(BX), X0 PXOR X3, X0 MOVUPS X0, 32(DX) MOVUPS 48(BX), X0 PXOR X4, X0 MOVUPS X0, 48(DX) MOVUPS 64(BX), X0 PXOR X5, X0 MOVUPS X0, 64(DX) MOVUPS 80(BX), X0 PXOR X6, X0 MOVUPS X0, 80(DX) MOVUPS 96(BX), X0 PXOR X7, X0 MOVUPS X0, 96(DX) MOVUPS 112(BX), X0 PXOR X8, X0 MOVUPS X0, 112(DX) RET golang.org/fips140@v1.26.0/fips140/v1.26.0/aes/ctr_arm64.s...
    Created: Tue Apr 07 11:13:11 GMT 2026
    - Last Modified: Thu Jan 08 17:58:32 GMT 2026
    - 660.3K bytes
    - Click Count (0)
  8. src/cmd/asm/internal/asm/testdata/amd64enc_extra.s

    	// Zevex_rm_v_r.
    	VADDPD Z2, Z9, Z21 // 62e1b54858ea
    	VADDPD Z21, Z2, Z9 // 6231ed4858cd
    	VADDPD Z9, Z21, Z2 // 62d1d54058d1
    
    	CLWB (BX) // 660fae33
    	CLDEMOTE (BX) // 0f1c03
    	TPAUSE BX // 660faef3
    	UMONITOR BX // f30faef3
    	UMWAIT BX // f20faef3
    
    	RDPID DX                                // f30fc7fa
    	RDPID R11                               // f3410fc7fb
    
    	ENDBR64					// f30f1efa
    
    Created: Tue Apr 07 11:13:11 GMT 2026
    - Last Modified: Thu Feb 20 11:20:03 GMT 2025
    - 57.7K bytes
    - Click Count (0)
  9. src/cmd/asm/internal/asm/testdata/amd64.s

    // LTYPEM spec6	{ outcode($1, &$2); }
    	MOVL	AX, R11
    	MOVL	$4, R11
    //	MOVL	AX, 0(AX):DS // no longer works - did it ever?
    
    // LTYPEI spec7	{ outcode($1, &$2); }
    	IMULB	DX
    	IMULW	DX, BX
    	IMULL	R11, R12
    	IMULQ	foo+4(SB), R11
    
    // LTYPEXC spec8	{ outcode($1, &$2); }
    	CMPPD	X1, X2, 4
    	CMPPD	foo+4(SB), X2, 4
    
    // LTYPEX spec9	{ outcode($1, &$2); }
    	PINSRW	$4, AX, X2
    Created: Tue Apr 07 11:13:11 GMT 2026
    - Last Modified: Tue Apr 09 18:57:21 GMT 2019
    - 3.3K bytes
    - Click Count (0)
  10. src/cmd/asm/internal/lex/lex_test.go

    			"\tPINSRW	$index, (BP)(R8*4), xmm",
    			"#define LOAD(off, reg) \\",
    			"\tMOVBLZX	(off*4)(R12),	reg \\",
    			"\tADDB	reg,		DX",
    			"KEYROUND(X0, LOAD, 8, AX, BX, 0)",
    		),
    		"\n.MOVBLZX.(.BP.).(.DX.*.4.).,.R8.\n.\n.MOVBLZX.(.(.8.+.1.).*.4.).(.R12.).,.BX.\n.ADDB.BX.,.DX.\n.MOVB.R8.,.(.8.*.4.).(.R12.).\n.PINSRW.$.0.,.(.BP.).(.R8.*.4.).,.X0.\n",
    	},
    	{
    		"taken #ifdef",
    		lines(
    			"#define A",
    			"#ifdef A",
    Created: Tue Apr 07 11:13:11 GMT 2026
    - Last Modified: Tue Aug 29 07:48:38 GMT 2023
    - 5.8K bytes
    - Click Count (0)
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