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Results 151 - 160 of 232 for stride_w (0.18 sec)
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src/vendor/golang.org/x/net/idna/trie.go
// For n < t.cutoff, the block is a simple lookup table. Otherwise, the block // is a list of ranges with an accompanying value. Given a matching range r, // the value for b is by r.value + (b - r.lo) * stride. func (t *sparseBlocks) lookup(n uint32, b byte) uint16 { offset := t.offset[n] header := t.values[offset] lo := offset + 1 hi := lo + uint16(header.lo) for lo < hi { m := lo + (hi-lo)/2 r := t.values[m]
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Jun 13 21:37:23 UTC 2023 - 1.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/tensorflow/utils/tf_to_xla_attribute_utils.h
Value CalculatePaddingAndPadIfNeeded(OpBuilder &builder, Location loc, Value input, Value filter, int8_t input_zp_value, ArrayAttr strides, ArrayAttr dilations, StringAttr conv_padding, ArrayAttr explicit_paddings,
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Sun Dec 10 05:52:02 UTC 2023 - 2K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/text/unicode/norm/trie.go
// For n < t.cutoff, the block is a simple lookup table. Otherwise, the block // is a list of ranges with an accompanying value. Given a matching range r, // the value for b is by r.value + (b - r.lo) * stride. func (t *sparseBlocks) lookup(n uint32, b byte) uint16 { offset := t.offset[n] header := t.values[offset] lo := offset + 1 hi := lo + uint16(header.lo) for lo < hi { m := lo + (hi-lo)/2 r := t.values[m]
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Jan 24 13:01:26 UTC 2024 - 1.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/ir/tf_ops_a_m.cc
static LogicalResult VerifyConvOpAttributes( int num_dims, ArrayRef<Attribute> strides, ArrayRef<Attribute> dilations, std::optional<mlir::Location> location) { int64_t strides_size = strides.size(); if (strides_size != num_dims) return emitOptionalError( location, "requires strides attribute length to be ", num_dims); auto is_not_positive = [](Attribute val) {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 16:01:03 UTC 2024 - 146.7K bytes - Viewed (0) -
android/guava/src/com/google/common/primitives/UnsignedBytes.java
Registered: Wed Jun 12 16:38:11 UTC 2024 - Last Modified: Fri Jun 07 22:25:23 UTC 2024 - 18.3K bytes - Viewed (0) -
src/regexp/syntax/parse.go
for _, xr := range x.R16 { lo, hi, stride := rune(xr.Lo), rune(xr.Hi), rune(xr.Stride) if stride == 1 { r = appendRange(r, lo, hi) continue } for c := lo; c <= hi; c += stride { r = appendRange(r, c, c) } } for _, xr := range x.R32 { lo, hi, stride := rune(xr.Lo), rune(xr.Hi), rune(xr.Stride) if stride == 1 { r = appendRange(r, lo, hi) continue }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 02 13:59:01 UTC 2024 - 52.1K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/end2end/conv_2d_nchw.pbtxt
} attr { key: "explicit_paddings" value { list { } } } attr { key: "padding" value { s: "SAME" } } attr { key: "strides" value { list { i: 1 i: 1 i: 1 i: 1 } } } attr { key: "use_cudnn_on_gpu" value { b: true } }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri Dec 03 03:26:13 UTC 2021 - 3.7K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/tpu_space_to_depth_pass.mlir
// CHECK: "tf.Conv2D" // CHECK-SAME: strides = [1, 1, 1, 1] // CHECK-SAME: (tensor<2x115x115x12xf32>, tensor<4x4x12x64xf32>) -> tensor<2x112x112x64xf32> %6 = "tf.Conv2D"(%5, %arg1) {data_format = "NHWC", dilations = [1, 1, 1, 1], explicit_paddings = [], padding = "VALID", strides = [1, 2, 2, 1], use_cudnn_on_gpu = true} : (tensor<2x230x230x3xf32>, tensor<7x7x3x64xf32>) -> tensor<2x112x112x64xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 37.4K bytes - Viewed (0) -
tensorflow/compiler/mlir/tfrt/tests/tf_to_corert/tf_to_corert_pipeline.mlir
%outputs_8, %control_9 = tf_executor.island wraps "tf.Conv2D"(%arg0, %outputs_0) {data_format = "NHWC", device = "", dilations = [1, 1, 1, 1], explicit_paddings = [], padding = "SAME", strides = [1, 2, 2, 1], use_cudnn_on_gpu = true} : (tensor<16x224x224x3xf32>, tensor<*xf32>) -> tensor<16x112x112x?xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed May 08 00:18:59 UTC 2024 - 7.7K bytes - Viewed (0) -
test/fixedbugs/issue21655.go
// To trigger issue21655, the index offset needs to be small // enough to fit into an int32 (to get rewritten to an ADDQconst) // but large enough to overflow an int32 after multiplying by the stride. package main func f1(a []int64, i int64) int64 { return a[i+1<<30] } func f2(a []int32, i int64) int32 { return a[i+1<<30] } func f3(a []int16, i int64) int16 { return a[i+1<<30] }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Dec 08 03:53:18 UTC 2017 - 1.5K bytes - Viewed (0)