Search Options

Results per page
Sort
Preferred Languages
Advance

Results 1 - 8 of 8 for 7x7x3x64xf32 (0.29 sec)

  1. tensorflow/compiler/mlir/tensorflow/tests/tpu_space_to_depth_pass.mlir

        %9 = "tf.Mul"(%arg2, %8) : (tensor<f32>, tensor<7x7x3x64xf32>) -> tensor<7x7x3x64xf32>
        %10 = "tf.Sub"(%arg1, %9) : (tensor<7x7x3x64xf32>, tensor<7x7x3x64xf32>) -> tensor<7x7x3x64xf32>
        %11 = "tf.AddV2"(%arg3, %0) : (tensor<i64>, tensor<i64>) -> tensor<i64>
        func.return %10, %11 : tensor<7x7x3x64xf32>, tensor<i64>
      }
    }
    
    // -----
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 37.4K bytes
    - Viewed (0)
  2. tensorflow/compiler/mlir/tensorflow/g3doc/space_to_depth.md

         return ...
       }
       func @_func(%input: tensor<2x224x224x3xf32>,
                   %filter: tensor<7x7x3x64xf32>) {
         %6 = "tf.Conv2D"(%input, %filter)  {strides = [1, 2, 2, 1]}:
                     (tensor<2x230x230x3xf32>, tensor<7x7x3x64xf32>) ->
          tensor<2x112x112x64xf32>
       }
    }
    
    // With this pass, the program will be transformed into:
    module {
       func @while_body {
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Sat Oct 24 02:51:43 UTC 2020
    - 8.3K bytes
    - Viewed (0)
  3. tensorflow/compiler/mlir/tensorflow/tests/layout_optimization_to_nhwc.mlir

                                 %arg1: tensor<64xf32>,          // batch_norm args
                                 %arg2: tensor<256xf32>,          // batch_norm args
                                 %arg3: tensor<7x7x3x64xf32>,    // conv filter #0
                                 %arg4: tensor<1x1x64x256xf32>   // conv filter #1
                                ) -> tensor<?x256xf32> {
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 7.3K bytes
    - Viewed (0)
  4. tensorflow/compiler/mlir/tensorflow/transforms/tf_passes.td

            return ...
          }
          func @_func(%input: tensor<2x224x224x3xf32>, %filter: tensor<7x7x3x64xf32>) {
            %6 = "tf.Conv2D"(%input, %filter)  {strides = [1, 2, 2, 1]}: (tensor<2x230x230x3xf32>, tensor<7x7x3x64xf32>) -> tensor<2x112x112x64xf32>
          }
        }
        ```
    
        The program will be transformed into:
    
        ```mlir
        module {
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed Jun 12 21:18:05 UTC 2024
    - 99.6K bytes
    - Viewed (0)
  5. tensorflow/compiler/mlir/g3doc/_includes/tf_passes.md

        %device_launch = "tf_device.cluster_func"(%input,...) {func = @_func,...)
        return ...
      }
      func @_func(%input: tensor<2x224x224x3xf32>, %filter: tensor<7x7x3x64xf32>) {
        %6 = "tf.Conv2D"(%input, %filter)  {strides = [1, 2, 2, 1]}: (tensor<2x230x230x3xf32>, tensor<7x7x3x64xf32>) -> tensor<2x112x112x64xf32>
      }
    }
    ```
    
    The program will be transformed into:
    
    ```mlir
    module {
      func @while_body {
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed Aug 02 02:26:39 UTC 2023
    - 96.4K bytes
    - Viewed (0)
  6. tensorflow/compiler/mlir/tensorflow/tests/einsum.mlir

      // CHECK: %[[v1:.*]] = "tf.Transpose"(%arg1, %[[cst_1]]) : (tensor<2x4x7x3xf32>, tensor<4xi32>) -> tensor<2x7x3x4xf32>
      // CHECK: "tf.BatchMatMulV2"(%[[v0]], %[[v1]]) <{adj_x = false, adj_y = false}> : (tensor<2x7x5x3xf32>, tensor<2x7x3x4xf32>) -> tensor<2x7x5x4xf32>
    }
    
    func.func @einsum_matrixdotprod(%arg0: tensor<2x5x7x3xf32>, %arg1: tensor<7x3x4xf32>) -> tensor<2x5x4xf32> {
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Fri Jan 05 18:35:42 UTC 2024
    - 25.9K bytes
    - Viewed (0)
  7. tensorflow/compiler/mlir/lite/tests/prepare-tf.mlir

      %129 = "tf.Transpose"(%127, %cst_14) : (tensor<6x3x7x7xf32>, tensor<4xi64>) -> tensor<7x7x3x6xf32>
      %130 = "tf.Conv2D"(%arg0, %129) <{data_format = "NHWC", dilations = [1, 1, 1, 1], explicit_paddings = [0, 0, 3, 3, 3, 3, 0, 0], padding = "EXPLICIT", strides = [1, 2, 2, 1], use_cudnn_on_gpu = true}> : (tensor<1x224x224x3xf32>, tensor<7x7x3x6xf32>) -> tensor<1x112x112x6xf32>
      return %130 : tensor<1x112x112x6xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed May 29 07:26:59 UTC 2024
    - 59.8K bytes
    - Viewed (0)
  8. tensorflow/compiler/mlir/lite/stablehlo/tests/legalize_hlo.mlir

    // CHECK:           %[[VAL_2:.*]] = "tf.Conv2D"(%[[VAL_0]], %[[VAL_1]]) <{data_format = "NHWC", dilations = [1, 1, 1, 1], explicit_paddings = [0, 0, 1, 1, 1, 1, 0, 0], padding = "EXPLICIT", strides = [1, 1, 1, 1], use_cudnn_on_gpu = true}> : (tensor<?x8x8x8xf32>, tensor<8x8x8x64xf32>) -> tensor<?x3x3x64xf32>
    // CHECK:           return %[[VAL_2]] : tensor<?x3x3x64xf32>
    // CHECK:         }
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed May 29 07:26:59 UTC 2024
    - 340.2K bytes
    - Viewed (0)
Back to top