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Results 81 - 90 of 463 for int64Ptr (0.19 sec)
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tensorflow/compiler/mlir/tensorflow/transforms/stack_ops_decomposition.cc
llvm::function_ref<std::optional<Type>(int64_t)> arg_to_stack_type, llvm::function_ref<void(ArrayRef<BlockArgument>)> handle_new_size_vars = nullptr) { auto new_input_types = llvm::to_vector<8>(func.getFunctionType().getInputs()); auto size_var_type = GetSizeVarType(OpBuilder(func)); int64_t original_arg_count = new_input_types.size(); for (int64_t i = 0; i < original_arg_count; ++i) {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 16:01:03 UTC 2024 - 23.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/transforms/constant_fold.cc
} return size; }; int64_t results_size = get_size(inst->getResultTypes()); int64_t operands_size = get_size(inst->getOperandTypes()); constexpr int kSizeFactor = 2; // TODO(b/233827625): Remove TF_DISABLE_CONSTANT_FOLDING macro. #ifdef TF_DISABLE_CONSTANT_FOLDING constexpr int64_t kResultsSizeThreshold = 0; #else constexpr int64_t kResultsSizeThreshold = (1 << 23); // 1 MB #endif
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 16:01:03 UTC 2024 - 5.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/common/attrs_and_constraints.h
// permutation of `kNchwToNhwcPermutation`. inline constexpr std::array<int64_t, 4> kNhwcToNchwPermutation = {0, 3, 1, 2}; // Permutation from the NCHW tensor format to NHWC. This is an inverse // permutation of `kNchwToNhwcPermutation`. inline constexpr std::array<int64_t, 4> kNchwToNhwcPermutation = {0, 2, 3, 1}; // Permutation from the OIHW (== (output features, input features, height,
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 16:01:03 UTC 2024 - 9.9K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/transforms/unroll_batch_matmul.cc
} } // namespace template <typename BatchMatMulOpType> TF::ReshapeOp ConvertTFBatchMatMulOp<BatchMatMulOpType>::createReshapeOp( Value value, ArrayRef<int64_t> shape, Type element_type, Location loc, PatternRewriter& rewriter) { int64_t shape_rank = shape.size(); auto shape_spec_type = RankedTensorType::get({shape_rank}, rewriter.getIntegerType(64)); Type resultType = RankedTensorType::get(shape, element_type);
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 16:01:03 UTC 2024 - 11.6K bytes - Viewed (0) -
tensorflow/cc/experimental/base/public/tensor.h
// a TFRT backed tensor. // TODO(bmzhao): Add benchmarks on overhead for this function; we can // consider using int64_t* + length rather than vector. static Tensor FromBuffer(TF_DataType dtype, const std::vector<int64_t>& shape, void* data, size_t len, DeleterCallback deleter, Status* status);
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Oct 28 20:10:33 UTC 2020 - 6.3K bytes - Viewed (0) -
tensorflow/c/ops.cc
} void TF_ShapeInferenceContextDim(TF_ShapeInferenceContext* ctx, TF_ShapeHandle* shape_handle, int64_t i, TF_DimensionHandle* result) { int64_t rank = TF_ShapeInferenceContextRank(ctx, shape_handle); auto* cc_result = reinterpret_cast<DimensionHandle*>(result); if (i < -rank || i >= rank) { *cc_result = DimensionHandle(); return; }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Jul 28 22:41:35 UTC 2022 - 10.9K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/stablehlo/cc/permutation_test.cc
TEST(PermutationTest, PermuteEmptyArray) { const SmallVector<int> permutation_result = Permute<int>(SmallVector<int>{}, SmallVector<int64_t>{}); EXPECT_THAT(permutation_result, IsEmpty()); } TEST(PermutationTest, PermuteOneElement) { const SmallVector<int> single_element_array = {8}; const SmallVector<int64_t> permutation = {0}; const SmallVector<int> permutation_result = Permute<int>(single_element_array, permutation);
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri Mar 22 00:14:00 UTC 2024 - 2.1K bytes - Viewed (0) -
tensorflow/compiler/jit/xla_device_ops.h
.HostMemory("output") \ .TypeConstraint<int64_t>("out_type") \ .TypeConstraint("T", TYPES), \ ShapeOp<int64_t>); \ REGISTER_KERNEL_BUILDER(Name("ShapeN") \
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Nov 23 19:28:25 UTC 2021 - 17.1K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/transforms/set_tpu_infeed_layout.cc
std::iota(minor_to_major.begin(), minor_to_major.end(), 0); std::sort(minor_to_major.begin(), minor_to_major.end(), [=](int64_t a, int64_t b) { int64_t da = t.getDimSize(a); int64_t db = t.getDimSize(b); return da > db || (da == db && a > b); }); } std::vector<Attribute> elements;
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 16:01:03 UTC 2024 - 6.1K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/transforms/shape_inference.cc
std::optional<RankedTensorType> InferXlaConvOutputShape( llvm::SmallVector<int64_t> input_tensor_dims, llvm::SmallVector<int64_t> kernel_tensor_dims, llvm::SmallVector<int64_t> window_strides, llvm::SmallVector<std::pair<int64_t, int64_t>> paddings, llvm::SmallVector<int64_t> lhs_dilations, llvm::SmallVector<int64_t> rhs_dilations, int64_t batch_group_count, xla::ConvolutionDimensionNumbers dnums, Type element_type) {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Sat Jun 08 07:28:49 UTC 2024 - 134.1K bytes - Viewed (0)