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Results 51 - 60 of 179 for stride_w (0.19 sec)

  1. tensorflow/compiler/mlir/lite/stablehlo/transforms/hlo_matchers.cc

          assert(index[i] >= 0);
        }
    #endif  // NDEBUG
        int64_t offset = 0;
        int64_t stride = 1;
        for (int64_t dim = shape.size() - 1; dim >= 0; --dim) {
          offset += index[dim] * stride;
          stride *= shape[dim];
        }
        return offset;
      }
    
      int64_t offset_;
      int64_t stride_;
      int64_t size_;
    };
    
    template <typename T>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Apr 25 16:01:03 UTC 2024
    - 11.6K bytes
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  2. tensorflow/compiler/mlir/tensorflow/tests/layout_optimization_layout_assignment_to_nhwc.mlir

      // CHECK: %[[CST_0:.*]] = "tf.Const"() <{value = dense<[0, 3, 1, 2]> : tensor<4xi64>}>
      // CHECK: "tf.Transpose"(%[[R1]], %[[CST_0]])
      %0 = "tf.MaxPool"(%arg0)
           {
             data_format = "NCHW",
             ksize = [1, 1, 3, 3],
             padding = "SAME",
             strides = [1, 1, 2, 2]
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 4.5K bytes
    - Viewed (0)
  3. tensorflow/c/eager/dlpack.cc

      // 1) nullptr indicates tensor is compact and row-majored.
      // 2) fill in the strides array as the real case for compact row-major data.
      // Here we choose option 2, since some frameworks didn't handle the strides
      // argument properly.
      dlm_tensor->dl_tensor.strides = stride_arr->data();
    
      dlm_tensor->dl_tensor.byte_offset =
          0;  // TF doesn't handle the strides and byte_offsets here
      return static_cast<void*>(dlm_tensor);
    }
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Feb 15 09:49:45 UTC 2024
    - 12.8K bytes
    - Viewed (0)
  4. tensorflow/compiler/mlir/lite/stablehlo/transforms/composite_avg_pool.cc

      GetI32VectorFromDenseI64CompositeAttr(composite_attrs, "padding", &padding);
      data.ph = padding[0];
      data.pw = padding[1];
    
      std::vector<int32_t> strides;
      GetI32VectorFromDenseI64CompositeAttr(composite_attrs, "stride", &strides);
      data.sh = strides[0];
      data.sw = strides[1];
    
      data.ceil_mode =
          GetBoolFromCompositeAttr(composite_attrs, "ceil_mode").value();
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue May 28 23:16:05 UTC 2024
    - 9.2K bytes
    - Viewed (0)
  5. tensorflow/compiler/mlir/tensorflow/transforms/tpu_space_to_depth_pass.cc

      if (strides[0] != 1 || strides[3] != 1) return 1;
    
      // Space to depth only supports height_stride == width_stride case.
      if (strides[1] != strides[2]) return 1;
    
      return strides[1];
    }
    
    void TPUSpaceToDepthPass::runOnOperation() {
      std::optional<tf_device::ClusterFuncOp> cluster_func;
      // Space to depth only supports training loop.
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Apr 25 16:01:03 UTC 2024
    - 29.3K bytes
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  6. tensorflow/compiler/mlir/tensorflow/tests/layout_optimization_layout_assignment_to_nchw.mlir

      // CHECK-SAME: data_format = "NCHW"
      // CHECK-SAME: dilations = [1, 4, 2, 3]
      // CHECK-SAME: explicit_paddings = [1, 2, 7, 8, 3, 4, 5, 6]
      // CHECK-SAME: padding = "EXPLICIT"
      // CHECK-SAME: strides = [5, 8, 6, 7]
      // CHECK-SAME: (tensor<1x3x32x32xf32>, tensor<1x1x3x8xf32>) -> tensor<1x8x7x7xf32>
    
      // CHECK: %[[RES_PERM:.*]] = "tf.Const"() <{value = dense<[0, 2, 3, 1]> : tensor<4xi64>}>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 9K bytes
    - Viewed (0)
  7. tensorflow/compiler/mlir/tf2xla/transforms/legalize_tf.cc

          return failure();
    
        // We also need constant begin/end indices and strides to perform padding
        // calculations.
        // Bounded shape after performing strided slice
        SmallVector<int64_t, 4> shape;
        // Bounded begin, end, and strides for strided slice
        SmallVector<int64_t, 4> begin_indices, end_indices, strides;
        if (!op.GetSlicedShapeAndBoundRanges(&shape, &begin_indices, &end_indices,
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue Jun 11 20:00:43 UTC 2024
    - 291.8K bytes
    - Viewed (0)
  8. tensorflow/compiler/mlir/tf2xla/tests/legalize-tf-prefer-tf2xla.mlir

        // CHECK-NEXT: %3 = mhlo.reshape %2 : (tensor<1xi32>) -> tensor<i32>
        // CHECK-NEXT: %4 = mhlo.convert %3 : tensor<i32>
        // CHECK-NEXT: %5 = "mhlo.slice"(%1) <{limit_indices = dense<2> : tensor<1xi64>, start_indices = dense<1> : tensor<1xi64>, strides = dense<1> : tensor<1xi64>}> : (tensor<4xi32>) -> tensor<1xi32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Sat Apr 06 15:32:52 UTC 2024
    - 15.8K bytes
    - Viewed (0)
  9. tensorflow/compiler/mlir/lite/flatbuffer_export.cc

                                                               TFLOp op) {
      TfLitePoolParams pool_params;
      pool_params.stride_height = op.stride_h().getSExtValue();
      pool_params.stride_width = op.stride_w().getSExtValue();
      pool_params.filter_height = op.filter_h().getSExtValue();
      pool_params.filter_width = op.filter_w().getSExtValue();
      const auto padding = GetTflitePadding(inst, op.padding());
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed Jun 12 21:41:49 UTC 2024
    - 164.5K bytes
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  10. tensorflow/compiler/mlir/tf2xla/tests/legalize-tf.mlir

      // Dynamic stride: when `begin` and `end` inputs are unknown at compile time,
      // `strides` must be known.
      // CHECK: tf.StridedSlice
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon May 06 18:46:23 UTC 2024
    - 335.5K bytes
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