MOVF F6, 140(R29)
	MOVF F7, 144(R29)
	MOVF F8, 148(R29)
	MOVF F9, 152(R29)
	MOVF F10, 156(R29)
	MOVF F11, 160(R29)
	MOVF F12, 164(R29)
	MOVF F13, 168(R29)
	MOVF F14, 172(R29)
	MOVF F15, 176(R29)
	MOVF F16, 180(R29)
	MOVF F17, 184(R29)
	MOVF F18, 188(R29)
	MOVF F19, 192(R29)
	MOVF F20, 196(R29)
	MOVF F21, 200(R29)
	MOVF F22, 204(R29)
	MOVF F23, 208(R29)
	MOVF F24, 212(R29)
	MOVF F25, 216(R29)

	MOVD	R24, 128(R1)
	MOVD	R25, 136(R1)
	MOVD	R26, 144(R1)
	MOVD	R27, 152(R1)
	MOVD	R28, 160(R1)
	MOVD	R29, 168(R1)
	MOVD	g, 176(R1) // R30
	MOVD	R31, 184(R1)
	FMOVD	F14, 192(R1)
	FMOVD	F15, 200(R1)
	FMOVD	F16, 208(R1)
	FMOVD	F17, 216(R1)
	FMOVD	F18, 224(R1)
	FMOVD	F19, 232(R1)
	FMOVD	F20, 240(R1)
	FMOVD	F21, 248(R1)
	FMOVD	F22, 256(R1)
	FMOVD	F23, 264(R1)
	FMOVD	F24, 272(R1)
	FMOVD	F25, 280(R1)

	var f09 float32 = 1e-10
	var f10 float32 = 1e+10
	var f11 float32 = 1.e-10
	var f12 float32 = 1.e+10
	var f13 float32 = .1e-10
	var f14 float32 = .1e+10
	var f15 float32 = 1.1e-10
	var f16 float32 = 1.1e+10
	assert(f01 == -f00, "f01")
	assert(f02 == -f01, "f02")
	assert(f03 == f04, "f03")
	assert(f04 == f05, "f04")
	assert(f05 == f06, "f05")
	assert(f07 == -f08, "f07")

func f13[E1 ~byte, S1 ~[]E1, E2 ~byte, S2 ~[]E2](S1, S2) {}
func f14[E2 ~byte, S1 ~[]E1, E1 ~byte, S2 ~[]E2](S1, S2) {}
func f15[S1 ~[]E1, E2 ~byte, E1 ~byte, S2 ~[]E2](S1, S2) {}
func f16[E1 ~byte, E2 ~byte, S1 ~[]E1, S2 ~[]E2](S1, S2) {}
func f17[E2 ~byte, E1 ~byte, S1 ~[]E1, S2 ~[]E2](S1, S2) {}
func f18[E2 ~byte, E1 ~byte, S2 ~[]E2, S1 ~[]E1](S1, S2) {}
func f19[E1 ~byte, E2 ~byte, S2 ~[]E2, S1 ~[]E1](S1, S2) {}

	MOVD	(offset+8*16)(R1), g   \
	MOVD	(offset+8*17)(R1), R31

#define SAVE_FPR_SIZE (18*8)
#define SAVE_FPR(offset)               \
	FMOVD	F14, (offset+8*0)(R1)  \
	FMOVD	F15, (offset+8*1)(R1)  \
	FMOVD	F16, (offset+8*2)(R1)  \
	FMOVD	F17, (offset+8*3)(R1)  \
	FMOVD	F18, (offset+8*4)(R1)  \
	FMOVD	F19, (offset+8*5)(R1)  \
	FMOVD	F20, (offset+8*6)(R1)  \
	FMOVD	F21, (offset+8*7)(R1)  \
	FMOVD	F22, (offset+8*8)(R1)  \

// Use of this source code is governed by a BSD-style
// license that can be found in the LICENSE file.

package armasm

import (
	"bytes"
	"fmt"
	"strings"
)

var saveDot = strings.NewReplacer(
	".F16", "_dot_F16",
	".F32", "_dot_F32",
	".F64", "_dot_F64",
	".S32", "_dot_S32",
	".U32", "_dot_U32",
	".FXS", "_dot_S",
	".FXU", "_dot_U",
	".32", "_dot_32",
)

	VLD1.P (R6)(R11), [V31.D1]        <=>      ld1 {v31.1d}, [x6], x11
	VFMLA V29.S2, V20.S2, V14.S2      <=>      fmla v14.2s, v20.2s, v29.2s
	AESD V22.B16, V19.B16             <=>      aesd v19.16b, v22.16b
	SCVTFWS R3, F16                   <=>      scvtf s17, w6

6. Align directive

Go asm supports the PCALIGN directive, which indicates that the next instruction should be aligned

// CHECK-LABEL: func @transposeConv2D_3x3_f16
func.func @transposeConv2D_3x3_f16(%input: tensor<1x28x28x64xf16>, %filter: tensor<3x3x64x64xf16>) -> tensor<1x26x26x64xf16> {
  // cuDNN prefers NCHW data format for spatial convolutions in f16 before
  // compute capability 7.0 (NVIDIA Tensor Cores).

  // CHECK: "tf.Conv2D"(%[[INPUT_TRANSPOSE:[0-9]*]], %arg1)
  // CHECK-SAME: data_format = "NCHW"
  %0 = "tf.Conv2D"(%input, %filter)
       {

        get_num_elements(input_type) <= get_num_elements(output_type)) {
      return failure();
    }
    Type input_element_type = getElementTypeOrSelf(dequantize_op.getInput());
    // Most passthrough ops do not support F16.
    if (input_element_type.isF16()) {
      return failure();
    }

    // Set the output type of the dequantize op and push it down.
    dequantize_op.getOutput().setType(output_type);

	f7 = -f0
	f8 float64 = -1
	f9 float64 = -f4
	f10 = !f0 /* ERROR "not defined" */
	f11 = ^1
	f12 = ^i0
	f13 float64 = ^1
	f14 float64 = ^f4 /* ERROR "not defined" */
	f15 = *f0 /* ERROR "cannot indirect" */
	f16 = &f0
	f17 = *u16
	f18 = <-u16 /* ERROR "cannot receive" */
	f19 = ~ /* ERROR "cannot use ~ outside of interface or type constraint" */ f0

	// complex128
	c0 = complex128(1)
	c1 complex128 = c0
	c2 = +1