reg, success := ppc64.ConstantToCRbit(c)
				if !success {
					p.errorf("invalid CR bit register number %d", c)
				}
				prog.Reg = reg
			}
			break
		}
		if p.arch.Family == sys.MIPS || p.arch.Family == sys.MIPS64 || p.arch.Family == sys.RISCV64 {
			// 3-operand jumps.
			// First two must be registers
			target = &a[2]
			prog.From = a[0]
			prog.Reg = p.getRegister(prog, op, &a[1])
			break

<ul>

<li>
<code>(R5)(R6*1)</code>: The location at <code>R5</code> plus <code>R6</code>.
It is a scaled mode as on the x86, but the only scale allowed is <code>1</code>.
</li>

</ul>

<h3 id="mips">MIPS, MIPS64</h3>

<p>
General purpose registers are named <code>R0</code> through <code>R31</code>,
floating point registers are <code>F0</code> through <code>F31</code>.
</p>

<p>

}

func TestPPC64OperandParser(t *testing.T) {
	parser := newParser("ppc64")
	testOperandParser(t, parser, ppc64OperandTests)
}

func TestMIPSOperandParser(t *testing.T) {
	parser := newParser("mips")
	testOperandParser(t, parser, mipsOperandTests)
}

func TestMIPS64OperandParser(t *testing.T) {
	parser := newParser("mips64")
	testOperandParser(t, parser, mips64OperandTests)
}

        ),
        cpu = "arm64-v8a",
    ),
    visibility = ["//visibility:public"],
)

config_setting(
    name = "android_mips",
    values = {
        "crosstool_top": "//external:android/crosstool",
        "cpu": "mips",
    },
    visibility = ["//visibility:public"],
)

config_setting(
    name = "android_mips64",
    values = {

	case "mips64", "mips64le":
		if gomips64 == "hardfloat" {
			return []string{"-mabi=64", "-mhard-float"}
		} else if gomips64 == "softfloat" {
			return []string{"-mabi=64", "-msoft-float"}
		}
	case "mips", "mipsle":
		if gomips == "hardfloat" {
			return []string{"-mabi=32", "-mfp32", "-mhard-float", "-mno-odd-spreg"}
		} else if gomips == "softfloat" {
			return []string{"-mabi=32", "-msoft-float"}
		}

pkg debug/elf, const EM_IA_64 Machine
pkg debug/elf, const EM_M32 Machine
pkg debug/elf, const EM_ME16 Machine
pkg debug/elf, const EM_MIPS Machine
pkg debug/elf, const EM_MIPS_RS3_LE Machine
pkg debug/elf, const EM_MIPS_RS4_BE Machine
pkg debug/elf, const EM_MIPS_X Machine
pkg debug/elf, const EM_MMA Machine
pkg debug/elf, const EM_NCPU Machine
pkg debug/elf, const EM_NDR1 Machine

pkg debug/elf, const EM_H8_500 = 49
pkg debug/elf, const EM_IA_64 = 50
pkg debug/elf, const EM_M32 = 1
pkg debug/elf, const EM_ME16 = 59
pkg debug/elf, const EM_MIPS = 8
pkg debug/elf, const EM_MIPS_RS3_LE = 10
pkg debug/elf, const EM_MIPS_RS4_BE = 10
pkg debug/elf, const EM_MIPS_X = 51
pkg debug/elf, const EM_MMA = 54
pkg debug/elf, const EM_NCPU = 56
pkg debug/elf, const EM_NDR1 = 57
pkg debug/elf, const EM_NONE = 0