#define Big		0x4330000000000000 // 2**52

// func archFloor(x float64) float64
TEXT ·archFloor(SB),NOSPLIT,$0
	MOVQ	x+0(FP), AX
	MOVQ	$~(1<<63), DX // sign bit mask
	ANDQ	AX,DX // DX = |x|
	SUBQ	$1,DX
	MOVQ    $(Big - 1), CX // if |x| >= 2**52-1 or IsNaN(x) or |x| == 0, return x
	CMPQ	DX,CX
	JAE     isBig_floor
	MOVQ	AX, X0 // X0 = x
	CVTTSD2SQ	X0, AX
	CVTSQ2SD	AX, X1 // X1 = float(int(x))

	MOVL	DX, nsec+8(FP)
	RET

TEXT runtime·nanotime1(SB),NOSPLIT,$32
	MOVQ	$CLOCK_MONOTONIC, DI	// arg 1 - clock_id
	LEAQ	8(SP), SI		// arg 2 - tp
	MOVL	$SYS___clock_gettime50, AX
	SYSCALL
	MOVQ	8(SP), AX		// sec
	MOVQ	16(SP), DX		// nsec

	// sec is in AX, nsec in DX
	// return nsec in AX
	IMULQ	$1000000000, AX
	ADDQ	DX, AX
	MOVQ	AX, ret+0(FP)
	RET

TEXT runtime·getcontext(SB),NOSPLIT,$-8

	VFIXUPIMMPS $82, 15(DX)(BX*1), Z5, K1, Z13         // 6273554954ac1a0f00000052
	VFIXUPIMMPS $82, -7(CX)(DX*2), Z5, K1, Z13         // 6273554954ac51f9ffffff52
	VFIXUPIMMPS $82, Z2, Z23, K1, Z13                  // 6273454154ea52
	VFIXUPIMMPS $82, 15(DX)(BX*1), Z23, K1, Z13        // 6273454154ac1a0f00000052
	VFIXUPIMMPS $82, -7(CX)(DX*2), Z23, K1, Z13        // 6273454154ac51f9ffffff52

	MOVL	val+8(FP), CX
casloop:
	MOVL 	CX, DX
	MOVL	(BX), AX
	ORL	AX, DX
	LOCK
	CMPXCHGL	DX, (BX)
	JNZ casloop
	MOVL 	AX, ret+16(FP)
	RET

// func And32(addr *uint32, v uint32) old uint32
TEXT ·And32(SB), NOSPLIT, $0-20
	MOVQ	ptr+0(FP), BX
	MOVL	val+8(FP), CX
casloop:
	MOVL 	CX, DX
	MOVL	(BX), AX
	ANDL	AX, DX
	LOCK
	CMPXCHGL	DX, (BX)
	JNZ casloop
	MOVL 	AX, ret+16(FP)
	RET

  // y = acos(x)
  // dy/dx = - 1 / (1 - x * x)^1/2
  // dx = dy * (- 1 / (1 - x * x)^1/2)
  auto x2 = Square(scope, op.input(0));
  auto one = Cast(scope, Const(scope, 1.0), op.input(0).type());
  auto dydx = Neg(scope, Reciprocal(scope, Sqrt(scope, Sub(scope, one, x2))));
  auto dx = Mul(scope, grad_inputs[0], dydx);
  grad_outputs->push_back(dx);
  return scope.status();
}

	VPCOMPRESSB X13, K1, X28                           // 62127d0963ec
	VPCOMPRESSB X8, K1, X28                            // 62127d0963c4
	VPCOMPRESSB X7, K1, -7(CX)(DX*1)                   // 62f27d09637c11f9
	VPCOMPRESSB X13, K1, -7(CX)(DX*1)                  // 62727d09636c11f9
	VPCOMPRESSB X8, K1, -7(CX)(DX*1)                   // 62727d09634411f9
	VPCOMPRESSB X7, K1, -15(R14)(R15*4)                // 62927d09637cbef1

	// so this function is reentrant.
	MOVL	m_vdsoPC(SI), CX
	MOVL	m_vdsoSP(SI), DX
	MOVL	CX, 0(SP)
	MOVL	DX, 4(SP)

	LEAL	sec+0(FP), DX
	MOVL	-4(DX), CX
	MOVL	CX, m_vdsoPC(SI)
	MOVL	DX, m_vdsoSP(SI)

	CMPL	AX, m_curg(SI)	// Only switch if on curg.
	JNE	noswitch

	MOVL	m_g0(SI), DX
	MOVL	(g_sched+gobuf_sp)(DX), SP	// Set SP to g0 stack

noswitch:
	SUBL	$16, SP		// Space for results

	MOVL	((index-2)*4)(BP), AX; \
	MOVL	AX, CX; \
	RORL	$17, AX; \
	MOVL	CX, DX; \
	RORL	$19, CX; \
	SHRL	$10, DX; \
	MOVL	((index-15)*4)(BP), BX; \
	XORL	CX, AX; \
	MOVL	BX, CX; \
	XORL	DX, AX; \
	RORL	$7, BX; \
	MOVL	CX, DX; \
	SHRL	$3, DX; \
	RORL	$18, CX; \
	ADDL	((index-7)*4)(BP), AX; \
	XORL	CX, BX; \
	XORL	DX, BX; \
	ADDL	((index-16)*4)(BP), BX; \
	ADDL	BX, AX; \
	MOVL	AX, ((index)*4)(BP)

	MULQ  h0;                      \
	MOVQ  AX, t0;                  \
	MOVQ  DX, t1;                  \
	MOVQ  r0, AX;                  \
	MULQ  h1;                      \
	ADDQ  AX, t1;                  \
	ADCQ  $0, DX;                  \
	MOVQ  r0, t2;                  \
	IMULQ h2, t2;                  \
	ADDQ  DX, t2;                  \
	                               \
	MOVQ  r1, AX;                  \

	VP4DPWSSD 15(DX)(BX*8), [Z2-Z5], K4, Z17           // 62e26f4c528cda0f000000
	VP4DPWSSD 7(SI)(DI*1), [Z12-Z15], K4, Z17          // 62e21f4c528c3e07000000
	VP4DPWSSD 15(DX)(BX*8), [Z12-Z15], K4, Z17         // 62e21f4c528cda0f000000
	VP4DPWSSD 7(SI)(DI*1), [Z22-Z25], K4, Z17          // 62e24f44528c3e07000000
	VP4DPWSSD 15(DX)(BX*8), [Z22-Z25], K4, Z17         // 62e24f44528cda0f000000