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Results 41 - 50 of 77 for cmp1 (0.04 sec)

  1. tensorflow/compiler/mlir/tfr/tests/control_flow.mlir

                          %n: i32 {tfr.name="N"},
                          %axis: i32 {tfr.name="axis"}) -> !tfr.tensor {
      %index = arith.constant 0 : index
      %cst = arith.constant 1 : i32
      %eq = arith.cmpi eq, %n, %cst : i32
      %v1 = tfr.get_element %values[%index] : (!tfr.tensor_list, index) -> !tfr.tensor
      %temp = tfr.call @tf__expand_dims(%v1, %axis) : (!tfr.tensor, i32) -> !tfr.tensor
      %res = scf.if %eq -> !tfr.tensor {
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Fri Mar 25 10:58:25 UTC 2022
    - 3.2K bytes
    - Viewed (0)
  2. src/cmd/compile/internal/ssa/_gen/AMD64splitload.rules

    (CMP(Q|L|W|B)loadidx1 {sym} [off] ptr idx x mem) => (CMP(Q|L|W|B) (MOV(Q|L|W|B)loadidx1 {sym} [off] ptr idx mem) x)
    (CMPQloadidx8 {sym} [off] ptr idx x mem) => (CMPQ (MOVQloadidx8 {sym} [off] ptr idx mem) x)
    (CMPLloadidx4 {sym} [off] ptr idx x mem) => (CMPL (MOVLloadidx4 {sym} [off] ptr idx mem) x)
    (CMPWloadidx2 {sym} [off] ptr idx x mem) => (CMPW (MOVWloadidx2 {sym} [off] ptr idx mem) x)
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Oct 04 19:35:46 UTC 2022
    - 3.4K bytes
    - Viewed (0)
  3. src/cmd/internal/notsha256/sha256block_386.s

    	SHA256ROUND(index, const, a, b, c, d, e, f, g, h)
    
    TEXT ·block(SB),0,$296-16
    	MOVL	p_base+4(FP), SI
    	MOVL	p_len+8(FP), DX
    	SHRL	$6, DX
    	SHLL	$6, DX
    
    	LEAL	(SI)(DX*1), DI
    	MOVL	DI, 288(SP)
    	CMPL	SI, DI
    	JEQ	end
    
    	LEAL	256(SP), DI		// variables
    
    	MOVL	dig+0(FP), BP
    	MOVL	(0*4)(BP), AX		// a = H0
    	MOVL	AX, (0*4)(DI)
    	MOVL	(1*4)(BP), BX		// b = H1
    	MOVL	BX, (1*4)(DI)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 19 23:33:27 UTC 2023
    - 8.2K bytes
    - Viewed (0)
  4. src/cmd/internal/obj/ppc64/anames.go

    	"FRIZ",
    	"FRIZCC",
    	"FRIN",
    	"FRINCC",
    	"FRSQRTE",
    	"FRSQRTECC",
    	"FSEL",
    	"FSELCC",
    	"FSQRT",
    	"FSQRTCC",
    	"FSQRTS",
    	"FSQRTSCC",
    	"CNTLZD",
    	"CNTLZDCC",
    	"CMPW",
    	"CMPWU",
    	"CMPB",
    	"FTDIV",
    	"FTSQRT",
    	"DIVD",
    	"DIVDCC",
    	"DIVDE",
    	"DIVDECC",
    	"DIVDEU",
    	"DIVDEUCC",
    	"DIVDVCC",
    	"DIVDV",
    	"DIVDU",
    	"DIVDUCC",
    	"DIVDUVCC",
    	"DIVDUV",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Apr 01 18:50:29 UTC 2024
    - 6.7K bytes
    - Viewed (0)
  5. pkg/slices/slices_test.go

    // See the License for the specific language governing permissions and
    // limitations under the License.
    
    package slices
    
    import (
    	"cmp"
    	"fmt"
    	"math/rand"
    	"reflect"
    	"strconv"
    	"testing"
    
    	cmp2 "github.com/google/go-cmp/cmp"
    
    	"istio.io/istio/pkg/test/util/assert"
    	"istio.io/istio/tests/util/leak"
    )
    
    type s struct {
    	Junk string
    }
    
    func TestEqual(t *testing.T) {
    Registered: Fri Jun 14 15:00:06 UTC 2024
    - Last Modified: Fri May 10 23:33:56 UTC 2024
    - 18.2K bytes
    - Viewed (0)
  6. src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/plan9.go

    	LFDU: "FMOVDU", STFDU: "FMOVDU",
    	LFDUX: "FMOVDU", STFDUX: "FMOVDU",
    	LFSX: "FMOVS", STFSX: "FMOVS",
    	LFSU: "FMOVSU", STFSU: "FMOVSU",
    	LFSUX: "FMOVSU", STFSUX: "FMOVSU",
    	CMPD: "CMP", CMPDI: "CMP",
    	CMPW: "CMPW", CMPWI: "CMPW",
    	CMPLD: "CMPU", CMPLDI: "CMPU",
    	CMPLW: "CMPWU", CMPLWI: "CMPWU",
    	MTSPR: "MOVD", MFSPR: "MOVD", // the width is ambiguous for SPRs
    	B:  "BR",
    	BL: "CALL",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Nov 22 17:16:14 UTC 2022
    - 10.9K bytes
    - Viewed (0)
  7. test/codegen/switch.go

    // See issue 53333.
    func mimetype(ext string) string {
    	// amd64: `CMPB\s1\(.*\), \$104$`,-`cmpstring`
    	// arm64: `MOVB\s1\(R.*\), R.*$`, `CMPW\s\$104, R.*$`, -`cmpstring`
    	switch ext {
    	// amd64: `CMPL\s\(.*\), \$1836345390$`
    	// arm64: `MOVD\s\$1836345390`, `CMPW\sR.*, R.*$`
    	case ".htm":
    		return "A"
    	// amd64: `CMPL\s\(.*\), \$1953457454$`
    	// arm64: `MOVD\s\$1953457454`, `CMPW\sR.*, R.*$`
    	case ".eot":
    		return "B"
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Oct 09 18:39:50 UTC 2023
    - 3.6K bytes
    - Viewed (0)
  8. src/cmd/asm/internal/asm/testdata/amd64.s

    // LTYPE3 rimrem	{ outcode($1, &$2); }
    	SUBQ $4, DI
    	SUBQ R11, DI
    	SUBQ 4(R11), DI
    	SUBQ foo+4(SB), DI
    	SUBQ $4, 8(R12)
    	SUBQ R11, 8(R12)
    	SUBQ R11, foo+4(SB)
    
    // LTYPE4 remrim	{ outcode($1, &$2); }
    	CMPB	CX, $4
    
    // LTYPER nonrel	{ outcode($1, &$2); }
    label:
    	JB	-4(PC) // JCS -4(PC)
    	JB	label // JCS 17
    
    // LTYPEC spec3	{ outcode($1, &$2); }
    	JCS	2(PC)
    	JMP	-4(PC)
    	JCS	2(PC)
    	JMP	label // JMP 17
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Apr 09 18:57:21 UTC 2019
    - 3.3K bytes
    - Viewed (0)
  9. pkg/controller/volume/persistentvolume/pv_controller_base.go

    // The method also removes any external PV Deletion Protection finalizers added on the PV, this represents CSI migration
    // rollback/disable scenarios.
    func modifyDeletionFinalizers(logger klog.Logger, cmpm CSIMigratedPluginManager, volume *v1.PersistentVolume) ([]string, bool) {
    	modified := false
    	var outFinalizers []string
    	if !utilfeature.DefaultFeatureGate.Enabled(features.HonorPVReclaimPolicy) {
    Registered: Sat Jun 15 01:39:40 UTC 2024
    - Last Modified: Fri May 10 08:42:31 UTC 2024
    - 29.5K bytes
    - Viewed (0)
  10. src/math/exp_amd64.s

    	MOVQ    $~(1<<63), AX // sign bit mask
    	MOVQ    BX, DX
    	ANDQ    AX, DX
    	MOVQ    $PosInf, AX
    	CMPQ    AX, DX
    	JLE     notFinite
    	// check if argument will overflow
    	MOVQ    BX, X0
    	MOVSD   $Overflow, X1
    	COMISD  X1, X0
    	JA      overflow
    	MOVSD   $LOG2E, X1
    	MULSD   X0, X1
    	CVTSD2SL X1, BX // BX = exponent
    	CVTSL2SD BX, X1
    	CMPB ·useFMA(SB), $1
    	JE   avxfma
    	MOVSD   $LN2U, X2
    	MULSD   X1, X2
    	SUBSD   X2, X0
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Apr 15 15:48:19 UTC 2021
    - 4.2K bytes
    - Viewed (0)
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