Search Options

Results per page
Sort
Preferred Languages
Advance

Results 21 - 30 of 85 for v11 (0.04 sec)

  1. src/math/big/arith_s390x.s

    	VPDI $0x4, V4, V4, V4    // flip the doublewords to big-endian order
    	VPDI $0x4, V11, V11, V11 // flip the doublewords to big-endian order
    	VPDI $0x4, V12, V12, V12 // flip the doublewords to big-endian order
    
    	VACCCQ V3, V11, V26, V27
    	VACQ   V3, V11, V26, V19
    	VACCCQ V4, V12, V27, V28
    	VACQ   V4, V12, V27, V20
    
    	VLM 0(R5), V7, V8   // 32-bytes into V1..V8
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 19 23:33:27 UTC 2023
    - 20.3K bytes
    - Viewed (0)
  2. platforms/documentation/docs/src/snippets/native-binaries/google-test/groovy/libs/googleTest/1.7.0/include/gtest/internal/gtest-param-util-generated.h

        typename T11>
    class ValueArray11 {
     public:
      ValueArray11(T1 v1, T2 v2, T3 v3, T4 v4, T5 v5, T6 v6, T7 v7, T8 v8, T9 v9,
          T10 v10, T11 v11) : v1_(v1), v2_(v2), v3_(v3), v4_(v4), v5_(v5), v6_(v6),
          v7_(v7), v8_(v8), v9_(v9), v10_(v10), v11_(v11) {}
    
      template <typename T>
      operator ParamGenerator<T>() const {
        const T array[] = {static_cast<T>(v1_), static_cast<T>(v2_),
    Registered: Wed Jun 12 18:38:38 UTC 2024
    - Last Modified: Mon Nov 27 17:53:42 UTC 2023
    - 187.7K bytes
    - Viewed (0)
  3. src/go/printer/testdata/complit.x

    	V9	= T{
    		F1: "hello",
    		// contains filtered or unexported fields
    	}
    	V10	= T{
    		F1:	"hello",
    
    		F4:	"world",
    		// contains filtered or unexported fields
    	}
    
    	// Other miscellaneous declarations
    	V11	= T{
    		t{
    			A: "world",
    			// contains filtered or unexported fields
    		},
    		// contains filtered or unexported fields
    	}
    	V12	= T{
    		F1:	make(chan int),
    
    		F3:	make(map[int]string),
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue May 01 19:53:32 UTC 2018
    - 1.1K bytes
    - Viewed (0)
  4. src/cmd/compile/internal/ssa/fuse_branchredirect.go

    // of an If block can be derived from its predecessor If block, in
    // some such cases, we can redirect the predecessor If block to the
    // corresponding successor block directly. For example:
    //
    //	p:
    //	  v11 = Less64 <bool> v10 v8
    //	  If v11 goto b else u
    //	b: <- p ...
    //	  v17 = Leq64 <bool> v10 v8
    //	  If v17 goto s else o
    //
    // We can redirect p to s directly.
    //
    // The implementation here borrows the framework of the prove pass.
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue May 16 21:40:11 UTC 2023
    - 3.2K bytes
    - Viewed (0)
  5. src/crypto/aes/asm_ppc64x.s

    	vciphel	Vout, V20, Vout \
    
    #define CLEAR_KEYS() \
    	VXOR	V6, V6, V6 \
    	VXOR	V7, V7, V7 \
    	VXOR	V8, V8, V8 \
    	VXOR	V9, V9, V9 \
    	VXOR	V10, V10, V10 \
    	VXOR	V11, V11, V11 \
    	VXOR	V12, V12, V12 \
    	VXOR	V13, V13, V13 \
    	VXOR	V14, V14, V14 \
    	VXOR	V15, V15, V15 \
    	VXOR	V16, V16, V16 \
    	VXOR	V17, V17, V17 \
    	VXOR	V18, V18, V18 \
    	VXOR	V19, V19, V19 \
    	VXOR	V20, V20, V20
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon May 20 18:05:32 UTC 2024
    - 18.6K bytes
    - Viewed (0)
  6. src/internal/bytealg/equal_arm64.s

    	VLD1.P	(R1), [V4.D2, V5.D2, V6.D2, V7.D2]
    	VCMEQ	V0.D2, V4.D2, V8.D2
    	VCMEQ	V1.D2, V5.D2, V9.D2
    	VCMEQ	V2.D2, V6.D2, V10.D2
    	VCMEQ	V3.D2, V7.D2, V11.D2
    	VAND	V8.B16, V9.B16, V8.B16
    	VAND	V8.B16, V10.B16, V8.B16
    	VAND	V8.B16, V11.B16, V8.B16
    	CMP	R0, R6
    	VMOV	V8.D[0], R4
    	VMOV	V8.D[1], R5
    	CBZ	R4, not_equal
    	CBZ	R5, not_equal
    	BNE	chunk64_loop
    	AND	$0x3f, R2, R2
    	CBZ	R2, equal
    chunk16:
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Jan 24 16:07:25 UTC 2024
    - 2.5K bytes
    - Viewed (0)
  7. src/runtime/asm_arm64.s

    	AESMC	V7.B16, V7.B16
    
    	SUB	$64, R2, R10
    	VLD1.P	(R0)(R10), [V8.B16, V9.B16, V10.B16, V11.B16]
    	VLD1	(R0), [V12.B16, V13.B16, V14.B16, V15.B16]
    	AESE	V0.B16,	 V8.B16
    	AESMC	V8.B16,  V8.B16
    	AESE	V1.B16,	 V9.B16
    	AESMC	V9.B16,  V9.B16
    	AESE	V2.B16, V10.B16
    	AESMC	V10.B16,  V10.B16
    	AESE	V3.B16, V11.B16
    	AESMC	V11.B16,  V11.B16
    	AESE	V4.B16, V12.B16
    	AESMC	V12.B16,  V12.B16
    	AESE	V5.B16, V13.B16
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Sat May 11 20:38:24 UTC 2024
    - 43.4K bytes
    - Viewed (0)
  8. src/go/printer/testdata/complit.input

    	V8 = T{
    		F1: "hello", f2: 1,
    		F3: "world",
    		f4: 2}
    	V9 = T{
    	f2: 1, F1: "hello",}
    	V10 = T{
    		F1: "hello", f2: 1,
    		f3: 2,
    		F4: "world", f5: 3,
    	}
    
    	// Other miscellaneous declarations
    	V11 = T{
    		t{
    			A: "world",
    			b: "hidden",
    		},
    		f2: t{
    			A: "world",
    			b: "hidden",
    		},
    	}
    	V12 = T{
    		F1: make(chan int),
    		f2: []int{},
    		F3: make(map[int]string), f4: 1,
    	}
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue May 01 19:53:32 UTC 2018
    - 912 bytes
    - Viewed (0)
  9. src/cmd/asm/internal/asm/testdata/arm64.s

    	VLD2.P	(R1)(R2), [V15.S2, V16.S2]                      // 2f88c20c
    	VLD3	(R27), [V11.S4, V12.S4, V13.S4]                 // 6b4b404c
    	VLD3.P	48(RSP), [V11.S4, V12.S4, V13.S4]               // eb4bdf4c
    	VLD3.P	(R30)(R2), [V14.D2, V15.D2, V16.D2]             // ce4fc24c
    	VLD4	(R15), [V10.H4, V11.H4, V12.H4, V13.H4]         // ea05400c
    	VLD4.P	32(R24), [V31.B8, V0.B8, V1.B8, V2.B8]          // 1f03df0c
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Dec 08 03:28:17 UTC 2023
    - 94.9K bytes
    - Viewed (0)
  10. src/internal/bytealg/index_ppc64x.s

    	VCMPEQUW V1, V4, V6         // compare index 1, 5, ... with sep
    	VCMPEQUW V1, V9, V11        // compare index 2, 6, ... with sep
    	VCMPEQUW V1, V10, V12       // compare index 3, 7, ... with sep
    	VSEL     V6, V5, V29, V13   // merge index 0, 1, 4, 5, using mask
    	VSEL     V12, V11, V30, V14 // merge index 2, 3, 6, 7, using mask
    	VSEL     V14, V13, V31, V7  // final merge
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Apr 21 16:47:45 UTC 2023
    - 31.6K bytes
    - Viewed (0)
Back to top