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Results 21 - 22 of 22 for srw (0.17 sec)

  1. src/cmd/compile/internal/ssa/_gen/PPC64.rules

    (Lsh16x(64|32|16|8)  x y) && shiftIsBounded(v) => (SLD x y)
    (Lsh8x(64|32|16|8)   x y) && shiftIsBounded(v) => (SLD x y)
    (Rsh64Ux(64|32|16|8) x y) && shiftIsBounded(v) => (SRD x y)
    (Rsh32Ux(64|32|16|8) x y) && shiftIsBounded(v) => (SRW x y)
    (Rsh16Ux(64|32|16|8) x y) && shiftIsBounded(v) => (SRD (MOVHZreg x) y)
    (Rsh8Ux(64|32|16|8)  x y) && shiftIsBounded(v) => (SRD (MOVBZreg x) y)
    (Rsh64x(64|32|16|8)  x y) && shiftIsBounded(v) => (SRAD x y)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Jun 07 19:02:52 UTC 2024
    - 53.2K bytes
    - Viewed (0)
  2. src/cmd/compile/internal/ssa/opGen.go

    			},
    			outputs: []outputInfo{
    				{0, 1073733624}, // R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R14 R15 R16 R17 R18 R19 R20 R21 R22 R23 R24 R25 R26 R27 R28 R29
    			},
    		},
    	},
    	{
    		name:   "SRW",
    		argLen: 2,
    		asm:    ppc64.ASRW,
    		reg: regInfo{
    			inputs: []inputInfo{
    				{0, 1073733630}, // SP SB R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R14 R15 R16 R17 R18 R19 R20 R21 R22 R23 R24 R25 R26 R27 R28 R29
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 1M bytes
    - Viewed (0)
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