VPGATHERQQ Y8, 0(Y9*4), Y10             // c422bd91148d00000000
	// AVX2GATHER: test SP/BP base with different displacements.
	VPGATHERQQ X0, (SP)(X1*1), X2           // c4e2f991140c
	VPGATHERQQ X0, 16(SP)(X1*1), X2         // c4e2f991540c10
	VPGATHERQQ X0, 512(SP)(X1*1), X2        // c4e2f991940c00020000
	VPGATHERQQ X0, (R12)(X1*1), X2          // c4c2f991140c

	VRSQRT28PS 17(SP)(BP*8), K1, Z12                   // 62727d49cca4ec11000000
	VRSQRT28PS 17(SP)(BP*4), K1, Z12                   // 62727d49cca4ac11000000
	VRSQRT28PS Z11, K1, Z22                            // 62c27d49ccf3
	VRSQRT28PS Z5, K1, Z22                             // 62e27d49ccf5
	VRSQRT28PS 17(SP)(BP*8), K1, Z22                   // 62e27d49ccb4ec11000000

	VRANGEPD $11, 17(SP)(BP*4), X31, K2, X12           // 6273850250a4ac110000000b
	VRANGEPD $11, X24, X23, K2, X16                    // 6283c50250c00b
	VRANGEPD $11, X14, X23, K2, X16                    // 62c3c50250c60b
	VRANGEPD $11, X0, X23, K2, X16                     // 62e3c50250c00b
	VRANGEPD $11, 17(SP)(BP*8), X23, K2, X16           // 62e3c5025084ec110000000b

TEXT asmtest(SB),DUPOK|NOSPLIT,$0
	// Instructions that were encoded with BYTE sequences.
	// Included to simplify validation of CL that fixed that.
	MOVQ (AX), M0  // 0f6f00
	MOVQ M0, 8(SP) // 0f7f442408
	MOVQ 8(SP), M0 // 0f6f442408
	MOVQ M0, (AX)  // 0f7f00
	MOVQ M0, (BX)  // 0f7f03
	// On non-64bit arch, Go asm allowed uint32 offsets instead of int32.
	// These tests check that property for backwards-compatibility.

R11, 328(SP) MOVQ R12, 336(SP) MOVQ R13, 344(SP) MOVQ 64(SP), R14 MOVQ 72(SP), R15 MOVQ 80(SP), DI MOVQ 88(SP), SI CALL p256MulInternal(SB) MOVQ R10, 224(SP) MOVQ R11, 232(SP) MOVQ R12, 240(SP) MOVQ R13, 248(SP) MOVQ 288(SP), R10 MOVQ 296(SP), R11 MOVQ 304(SP), R12 MOVQ 312(SP), R13 CALL p256MulInternal(SB) MOVQ 128(SP), R14 MOVQ 136(SP), R15 MOVQ 144(SP), DI MOVQ 152(SP), SI CALL p256MulInternal(SB) MOVQ R10, 256(SP) MOVQ R11, 264(SP) MOVQ R12, 272(SP) MOVQ R13, 280(SP) MOVQ 32(SP), R14 MOVQ 40(SP),...

	VPCOMPRESSW X12, K5, X7                            // 6272fd0d63e7
	VPCOMPRESSW X20, K5, 17(SP)(BP*2)                  // 62e2fd0d63a46c11000000
	VPCOMPRESSW X16, K5, 17(SP)(BP*2)                  // 62e2fd0d63846c11000000
	VPCOMPRESSW X12, K5, 17(SP)(BP*2)                  // 6272fd0d63a46c11000000
	VPCOMPRESSW X20, K5, -7(DI)(R8*4)                  // 62a2fd0d63a487f9ffffff

        ComparableVersion sp1 = new ComparableVersion("1.0-sp1-redhat");
        ComparableVersion sp2 = new ComparableVersion("1.0-sp-1-redhat");
        ComparableVersion sp3 = new ComparableVersion("1.0-sp.1-redhat");
        assertTrue(f.compareTo(sp1) < 0, "expected " + f + " < " + sp1);
        assertTrue(f.compareTo(sp2) < 0, "expected " + f + " < " + sp2);

R11, 328(SP) MOVQ R12, 336(SP) MOVQ R13, 344(SP) MOVQ 64(SP), R14 MOVQ 72(SP), R15 MOVQ 80(SP), DI MOVQ 88(SP), SI CALL p256MulInternal(SB) MOVQ R10, 224(SP) MOVQ R11, 232(SP) MOVQ R12, 240(SP) MOVQ R13, 248(SP) MOVQ 288(SP), R10 MOVQ 296(SP), R11 MOVQ 304(SP), R12 MOVQ 312(SP), R13 CALL p256MulInternal(SB) MOVQ 128(SP), R14 MOVQ 136(SP), R15 MOVQ 144(SP), DI MOVQ 152(SP), SI CALL p256MulInternal(SB) MOVQ R10, 256(SP) MOVQ R11, 264(SP) MOVQ R12, 272(SP) MOVQ R13, 280(SP) MOVQ 32(SP), R14 MOVQ 40(SP),...

	VGF2P8AFFINEQB $82, 17(SP)(BP*2), X21, K1, X15     // 6273d501cebc6c1100000052
	VGF2P8AFFINEQB $82, -7(DI)(R8*4), X21, K1, X15     // 6233d501cebc87f9ffffff52
	VGF2P8AFFINEQB $82, X22, X0, K1, X15               // 6233fd09cefe52
	VGF2P8AFFINEQB $82, X7, X0, K1, X15                // 6273fd09ceff52
	VGF2P8AFFINEQB $82, X19, X0, K1, X15               // 6233fd09cefb52

			nf, err = tryReadFull(zeroReader{}, bf)
		}
		b = b[nf:]
		sr.pos += int64(nf)
		if sr.pos >= holeEnd && len(sr.sp) > 1 {
			sr.sp = sr.sp[1:] // Ensure last fragment always remains
		}
	}

	n = len(b0) - len(b)
	switch {
	case err == io.EOF:
		return n, errMissData // Less data in dense file than sparse file
	case err != nil:
		return n, err