return cache.getIfPresent(key) != null;
  }

  @Test
  public void invalidate() {
    Cache<Integer, Integer> cache = CacheBuilder.newBuilder().build();

    cache.put(654, 2675);
    cache.put(2456, 56);
    cache.put(2, 15);

    cache.invalidate(654);

    assertThat(containsKey(cache, 654)).isFalse();
    assertThat(containsKey(cache, 2456)).isTrue();

    return cache.getIfPresent(key) != null;
  }

  @Test
  public void invalidate() {
    Cache<Integer, Integer> cache = CacheBuilder.newBuilder().build();

    cache.put(654, 2675);
    cache.put(2456, 56);
    cache.put(2, 15);

    cache.invalidate(654);

    assertThat(containsKey(cache, 654)).isFalse();
    assertThat(containsKey(cache, 2456)).isTrue();

     * Used in SMB2 READ and WRITE requests to indicate RDMA channel
     */
    public static final int SMB2_CHANNEL_RDMA_V1 = 0x00000001;

    /**
     * SMB2 Channel constant for RDMA V1 invalidate
     * Used to indicate RDMA with invalidation
     */
    public static final int SMB2_CHANNEL_RDMA_V1_INVALIDATE = 0x00000002;

    /**
     * SMB2 RDMA Transform Capabilities negotiate context ID
     */

            entry.updateState(newState);
            // Flush any cached data if losing write cache
            if (!entry.hasWriteCache()) {
                flushCachedWrites(entry.path);
            }
            // Invalidate cached data if losing read cache
            if (!entry.hasReadCache()) {
                invalidateReadCache(entry.path);
            }
            entry.breaking = false;
        }
    }
    

    }

    @Override
    public void invalidate() {
        if (valid && memoryRegister != null) {
            try {
                // In real implementation, this would deregister the memory:
                // memoryRegister.deregisterMemory();

                log.debug("DiSNI memory region invalidated");
            } catch (Exception e) {

        } else {
          headerValue = value
        }
      }

      name.equals("Pragma", ignoreCase = true) -> {
        // Might specify additional cache-control params. We invalidate just in case.
        canUseHeaderValue = false
      }

      else -> {
        continue@loop
      }
    }

    var pos = 0
    while (pos < value.length) {
      val tokenStart = pos

    }
    
    /**
     * Invalidate this memory region
     */
    public abstract void invalidate();
    
    protected abstract int generateLocalKey();
    protected abstract int generateRemoteKey();
    protected abstract long getBufferAddress(ByteBuffer buffer);
    
    @Override
    public void close() {
        invalidate();
        valid = false;
    }
}
```

                    this.currentHash = newHash.clone();
                }
            }
        }

        public boolean isValid() {
            return isValid;
        }

        public void invalidate() {
            this.isValid = false;
            // Clear sensitive data
            synchronized (hashLock) {
                Arrays.fill(currentHash, (byte) 0);
            }
        }
    }

        entry.updateChild("file1.txt", 1024L, 1000L, false, 0x20, 500L, 800L);
        entry.updateChild("file2.txt", 2048L, 2000L, false, 0x20, 600L, 900L);
        entry.markComplete();

        // Invalidate the cache
        entry.invalidate();

        assertFalse(entry.isComplete());
        assertTrue(entry.hasChanges());
        assertTrue(entry.getChildren().isEmpty());
    }

    @Test

     */
    public static int SMB2_CHANNEL_NONE = 0x0;
    /**
     * Channel type for RDMA version 1
     */
    public static int SMB2_CHANNEL_RDMA_V1 = 0x1;
    /**
     * Channel type for RDMA version 1 with invalidate
     */
    public static int SMB2_CHANNEL_RDMA_V1_INVALIDATE = 0x2;

    private byte[] fileId;
    private final byte[] outputBuffer;
    private final int outputBufferOffset;
    private byte padding;