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Results 21 - 24 of 24 for absIdx (0.44 sec)

  1. src/cmd/compile/internal/ssa/_gen/MIPS64.rules

    (Select0 <t> (Sub64borrow x y c)) => (SUBV (SUBV <t> x y) c)
    (Select1 <t> (Sub64borrow x y c)) =>
    	(OR (SGTU <t> s:(SUBV <t> x y) x) (SGTU <t> (SUBV <t> s c) s))
    
    // math package intrinsics
    (Abs ...) => (ABSD ...)
    
    // (x + y) / 2 with x>=y => (x - y) / 2 + y
    (Avg64u <t> x y) => (ADDV (SRLVconst <t> (SUBV <t> x y) [1]) y)
    
    (And(64|32|16|8) ...) => (AND ...)
    (Or(64|32|16|8) ...) => (OR ...)
    (Xor(64|32|16|8) ...) => (XOR ...)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Jul 31 03:59:48 UTC 2023
    - 41.9K bytes
    - Viewed (0)
  2. src/cmd/compile/internal/ssa/_gen/ARM.rules

    (Xor(32|16|8) ...) => (XOR ...)
    
    // unary ops
    (Neg(32|16|8) x) => (RSBconst [0] x)
    (Neg(32|64)F ...) => (NEG(F|D) ...)
    
    (Com(32|16|8) ...) => (MVN ...)
    
    (Sqrt ...) => (SQRTD ...)
    (Sqrt32 ...) => (SQRTF ...)
    (Abs ...) => (ABSD ...)
    
    // TODO: optimize this for ARMv5 and ARMv6
    (Ctz32NonZero ...) => (Ctz32 ...)
    (Ctz16NonZero ...) => (Ctz32 ...)
    (Ctz8NonZero ...) => (Ctz32 ...)
    
    // count trailing zero for ARMv5 and ARMv6
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Nov 20 17:19:36 UTC 2023
    - 90.1K bytes
    - Viewed (0)
  3. src/cmd/compile/internal/ssa/opGen.go

    			},
    			outputs: []outputInfo{
    				{0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
    			},
    		},
    	},
    	{
    		name:   "ABSD",
    		argLen: 1,
    		asm:    arm.AABSD,
    		reg: regInfo{
    			inputs: []inputInfo{
    				{0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
    			},
    			outputs: []outputInfo{
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 1M bytes
    - Viewed (0)
  4. src/internal/trace/traceviewer/static/trace_viewer_full.html

    alerts=getMissedFrameAlerts(Object.values(this.modelHelper.rendererHelpers));this.model.alerts=this.model.alerts.concat(alerts);}};Auditor.register(ChromeAuditor);return{ChromeAuditor,};});'use strict';tr.exportTo('tr.e.chrome',function(){const KNOWN_PROPERTIES={absX:1,absY:1,address:1,anonymous:1,childNeeds:1,children:1,classNames:1,col:1,colSpan:1,float:1,height:1,htmlId:1,name:1,posChildNeeds:1,positioned:1,positionedMovement:1,relX:1,relY:1,relativePositioned:1,row:1,rowSpan:1,selfNeeds:1,stickyPositioned:...
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Nov 21 20:45:06 UTC 2023
    - 2.5M bytes
    - Viewed (1)
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