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Results 101 - 110 of 232 for stride_w (0.18 sec)
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src/image/image.go
type RGBA struct { // Pix holds the image's pixels, in R, G, B, A order. The pixel at // (x, y) starts at Pix[(y-Rect.Min.Y)*Stride + (x-Rect.Min.X)*4]. Pix []uint8 // Stride is the Pix stride (in bytes) between vertically adjacent pixels. Stride int // Rect is the image's bounds. Rect Rectangle } func (p *RGBA) ColorModel() color.Model { return color.RGBAModel }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 19 12:02:45 UTC 2023 - 34.9K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/tensorflow/tests/lift_quantizable_spots_as_functions_xla.mlir
%0 = "tf.DepthwiseConv2dNative"(%arg0, %cst_0) {data_format = "NHWC", dilations = [1, 1, 1, 1], explicit_paddings = [], padding = "SAME", strides = [1, 2, 2, 1]} : (tensor<1x3x4x3xf32>, tensor<2x3x3x1xf32>) -> tensor<1x2x2x3xf32> %1 = "tf.BiasAdd"(%0, %cst) {data_format = "NHWC", device = ""} : (tensor<1x2x2x3xf32>, tensor<3xf32>) -> tensor<1x2x2x3xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 8.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/tensorflow/tests/prepare_quantize_drq.mlir
%0 = "tf.Conv2D"(%arg0, %arg1) {attr_map = "0:strides,1:use_cudnn_on_gpu,2:padding,3:explicit_paddings,4:dilations", data_format = "NHWC", device = "", dilations = [1, 1, 1, 1], explicit_paddings = [], padding = "SAME", strides = [1, 1, 2, 1], use_cudnn_on_gpu = true} : (tensor<1x3x4x3xf32>, tensor<2x3x3x512xf32>) -> tensor<*xf32> return %0 : tensor<*xf32> }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 6.7K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/utils/perception_ops_utils.cc
pool_params.filter_height = pool_size[0]; pool_params.filter_width = pool_size[1]; // Retrieve strides. llvm::SmallVector<int32_t, 2> strides; if (failed(GetIntegerArraySafe(&func_, attrs, "strides", &strides, 2))) { return failure(); } pool_params.stride_height = strides[0]; pool_params.stride_width = strides[1]; // Retrieves padding. auto padding = mlir::dyn_cast_or_null<StringAttr>(attrs.get("padding"));
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri May 17 17:58:54 UTC 2024 - 8.9K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/tensorflow/tests/cast_bf16_ops_to_f32.mlir
%1 = "tf.Conv2D"(%0, %cst) {data_format = "NHWC", device = "", dilations = [1, 1, 1, 1], explicit_paddings = [], padding = "SAME", strides = [1, 1, 2, 1], use_cudnn_on_gpu = true} : (tensor<1x3x4x3xbf16>, tensor<2x3x3x2xbf16>) -> tensor<1x3x2x2xbf16> %2 = "tf.AvgPool"(%1) {data_format = "NHWC", device = "", ksize = [1, 1, 1, 1], padding = "SAME", strides = [1, 1, 1, 1]} : (tensor<1x3x2x2xbf16>) -> tensor<1x3x2x2xbf16>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 8.4K bytes - Viewed (0) -
src/image/draw/draw.go
ddelta = dst.Stride sdelta = src.Stride i0, i1, idelta = 0, dx*4, +4 } else { // If the source start point is higher than the destination start point, or equal height but to the left, // then we compose the rows in right-to-left, bottom-up order instead of left-to-right, top-down. d0 += (dy - 1) * dst.Stride s0 += (dy - 1) * src.Stride ddelta = -dst.Stride sdelta = -src.Stride
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 11 17:08:05 UTC 2024 - 33.9K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/stablehlo/tests/bridge/optimize.mlir
// CHECK-DAG: %[[result:.*]] = chlo.broadcast_add %[[conv]], %[[combined]] // CHECK: return %[[result]] %0 = mhlo.convolution(%lhs, %rhs) dim_numbers = [b, 0, 1, f]x[0, 1, i, o]->[b, 0, 1, f], window = {stride = [1, 1], pad = [[0, 0], [0, 0]], lhs_dilate = [1, 1], rhs_dilate = [1, 1]} {batch_group_count = 1 : i64, feature_group_count = 1 : i64} : (tensor<?x3x2x1xi8>, tensor<2x1x1x1xi8>) -> tensor<?x2x2x1xi32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Sat Feb 24 02:26:47 UTC 2024 - 10.7K bytes - Viewed (0) -
src/image/png/reader.go
srcPix = src.(*image.Gray).Pix dstPix, stride, rect = target.Pix, target.Stride, target.Rect bytesPerPixel = 1 case *image.Gray16: srcPix = src.(*image.Gray16).Pix dstPix, stride, rect = target.Pix, target.Stride, target.Rect bytesPerPixel = 2 case *image.NRGBA: srcPix = src.(*image.NRGBA).Pix dstPix, stride, rect = target.Pix, target.Stride, target.Rect bytesPerPixel = 4 case *image.NRGBA64:
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 19 12:02:45 UTC 2023 - 26K bytes - Viewed (0) -
src/unicode/letter.go
} if r <= range_.Hi { return range_.Stride == 1 || (r-range_.Lo)%range_.Stride == 0 } } return false } // binary search over ranges lo := 0 hi := len(ranges) for lo < hi { m := int(uint(lo+hi) >> 1) range_ := &ranges[m] if range_.Lo <= r && r <= range_.Hi { return range_.Stride == 1 || (r-range_.Lo)%range_.Stride == 0 } if r < range_.Lo { hi = m
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Nov 06 20:02:46 UTC 2023 - 10K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/layout_optimization_layout_assignment_gpu_cc_60.mlir
// CHECK: "tf.Conv2D"(%[[INPUT_TRANSPOSE:[0-9]*]], %arg1) // CHECK-SAME: data_format = "NCHW" %0 = "tf.Conv2D"(%input, %filter) { data_format = "NHWC", padding = "VALID", strides = [1, 1, 1, 1] } : (tensor<1x28x28x64xf16>, tensor<3x3x64x64xf16>) -> tensor<1x26x26x64xf16> func.return %0 : tensor<1x26x26x64xf16> } // CHECK-LABEL: func @transposeConv2DBackpropFilter_f16
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Jun 21 08:41:18 UTC 2022 - 5.8K bytes - Viewed (0)