VPMADD52LUQ Y3, Y9, K1, Y2                         // 62f2b529b4d3
	VPMADD52LUQ Y2, Y9, K1, Y2                         // 62f2b529b4d2
	VPMADD52LUQ Y9, Y9, K1, Y2                         // 62d2b529b4d1
	VPMADD52LUQ 17(SP)(BP*1), Y9, K1, Y2               // 62f2b529b4942c11000000
	VPMADD52LUQ -7(CX)(DX*8), Y9, K1, Y2               // 62f2b529b494d1f9ffffff
	VPMADD52LUQ Y3, Y1, K1, Y2                         // 62f2f529b4d3

	VPERMI2B Y9, Y22, K2, Y2                           // 62d24d2275d1
	VPERMI2B 15(R8)(R14*1), Y22, K2, Y2                // 62924d227594300f000000
	VPERMI2B 15(R8)(R14*2), Y22, K2, Y2                // 62924d227594700f000000
	VPERMI2B Y18, Y20, K2, Y2                          // 62b25d2275d2
	VPERMI2B Y24, Y20, K2, Y2                          // 62925d2275d0

    /*
     * For an explanation of the basic principle behind this check, see
     * https://stackoverflow.com/a/35754308/28465
     *
     * In that explanation's notation, our `overlap` check would be `x1 < y2 && y1 < x2`. We've
     * flipped one part of the check so that we're using "less than" in both cases (rather than a
     * mix of "less than" and "greater than"). We've also switched to "strictly less than" rather

	VPDPWSSD Y8, Y2, K3, Y14                           // 62526d2b52f0
	VPDPWSSD Y9, Y2, K3, Y14                           // 62526d2b52f1
	VPDPWSSD Y22, Y2, K3, Y14                          // 62326d2b52f6
	VPDPWSSD 15(R8)(R14*4), Y2, K3, Y14                // 62126d2b52b4b00f000000
	VPDPWSSD -7(CX)(DX*4), Y2, K3, Y14                 // 62726d2b52b491f9ffffff

    /*
     * For an explanation of the basic principle behind this check, see
     * https://stackoverflow.com/a/35754308/28465
     *
     * In that explanation's notation, our `overlap` check would be `x1 < y2 && y1 < x2`. We've
     * flipped one part of the check so that we're using "less than" in both cases (rather than a
     * mix of "less than" and "greater than"). We've also switched to "strictly less than" rather

	VGF2P8MULB Y2, Y28, K1, Y31                        // 62621d21cffa
	VGF2P8MULB Y21, Y28, K1, Y31                       // 62221d21cffd
	VGF2P8MULB Y12, Y28, K1, Y31                       // 62421d21cffc
	VGF2P8MULB (R8), Y28, K1, Y31                      // 62421d21cf38
	VGF2P8MULB 15(DX)(BX*2), Y28, K1, Y31              // 62621d21cfbc5a0f000000
	VGF2P8MULB Y2, Y13, K1, Y31                        // 62621529cffa

	VPSHLDW $67, Y12, Y2, K4, Y9                       // 6253ed2c70cc43
	VPSHLDW $67, Y21, Y2, K4, Y9                       // 6233ed2c70cd43
	VPSHLDW $67, Y14, Y2, K4, Y9                       // 6253ed2c70ce43
	VPSHLDW $67, -17(BP)(SI*2), Y2, K4, Y9             // 6273ed2c708c75efffffff43
	VPSHLDW $67, 7(AX)(CX*2), Y2, K4, Y9               // 6273ed2c708c480700000043

	VPCMPGTQ Y9, Y2, K5, K6                            // 62d2ed2d37f1
	VPCMPGTQ -15(R14)(R15*1), Y2, K5, K6               // 6292ed2d37b43ef1ffffff
	VPCMPGTQ -15(BX), Y2, K5, K6                       // 62f2ed2d37b3f1ffffff
	VPCMPGTQ Y9, Y2, K5, K5                            // 62d2ed2d37e9
	VPCMPGTQ -15(R14)(R15*1), Y2, K5, K5               // 6292ed2d37ac3ef1ffffff

	VPACKUSDW -7(CX)(DX*8), X25, K3, X0                // 62f235032b84d1f9ffffff
	VPACKUSDW Y22, Y2, K3, Y25                         // 62226d2b2bce
	VPACKUSDW 7(AX)(CX*4), Y2, K3, Y25                 // 62626d2b2b8c8807000000
	VPACKUSDW 7(AX)(CX*1), Y2, K3, Y25                 // 62626d2b2b8c0807000000
	VPACKUSDW Z14, Z3, K2, Z27                         // 6242654a2bde

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