{1, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
			},
		},
	},
	{
		name:   "CMPW",
		argLen: 2,
		asm:    x86.ACMPW,
		reg: regInfo{
			inputs: []inputInfo{
				{0, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
				{1, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
			},
		},
	},
	{

	VPCLMULQDQ $127, (R15), X28, X16                   // 62c31d0044077f or 62c39d0044077f
	VPCLMULQDQ $0, Y15, Y2, Y31                        // 62436d2844ff00 or 6243ed2844ff00
	VPCLMULQDQ $0, Y22, Y2, Y31                        // 62236d2844fe00 or 6223ed2844fe00
	VPCLMULQDQ $0, Y20, Y2, Y31                        // 62236d2844fc00 or 6223ed2844fc00

	// Case for 8 ≤ n < 16 bytes
	MOVD	(R4)(R8), R14   // R14 = a[i,...,i+7]
	MOVD	(R5)(R8), R15   // R15 = b[i,...,i+7]
	XOR	R14, R15, R16   // R16 = a[] ^ b[]
	SUB	$8, R6          // n = n - 8
	MOVD	R16, (R3)(R8)   // Store to dst
	ADD	$8, R8
xor4:
	CMP	R6, $4
	BLT	xor2
	MOVWZ	(R4)(R8), R14
	MOVWZ	(R5)(R8), R15
	XOR	R14, R15, R16
	MOVW	R16, (R3)(R8)
	ADD	$4,R8
	ADD	$-4,R6
xor2:
	CMP	R6, $2
	BLT	xor1

	// r4 = a0×b4
	MOVQ (CX), AX
	MULQ 32(BX)
	MOVQ AX, R15
	MOVQ DX, R14

	// r4 += a1×b3
	MOVQ 8(CX), AX
	MULQ 24(BX)
	ADDQ AX, R15
	ADCQ DX, R14

	// r4 += a2×b2
	MOVQ 16(CX), AX
	MULQ 16(BX)
	ADDQ AX, R15
	ADCQ DX, R14

	// r4 += a3×b1
	MOVQ 24(CX), AX
	MULQ 8(BX)
	ADDQ AX, R15
	ADCQ DX, R14

	// r4 += a4×b0
	MOVQ 32(CX), AX
	MULQ (BX)

	MOVQ msg_base+8(FP), SI
	MOVQ msg_len+16(FP), R15

	MOVQ 0(DI), R8   // h0
	MOVQ 8(DI), R9   // h1
	MOVQ 16(DI), R10 // h2
	MOVQ 24(DI), R11 // r0
	MOVQ 32(DI), R12 // r1

	CMPQ R15, $16
	JB   bytes_between_0_and_15

loop:
	POLY1305_ADD(SI, R8, R9, R10)

multiply:
	POLY1305_MUL(R8, R9, R10, R11, R12, BX, CX, R13, R14)
	SUBQ $16, R15
	CMPQ R15, $16
	JAE  loop

bytes_between_0_and_15:

	VPCOMPRESSW Z3, K7, -15(R14)(R15*2)                // 6292fd4f639c7ef1ffffff
	VPCOMPRESSW Z0, K7, -15(R14)(R15*2)                // 6292fd4f63847ef1ffffff
	VPEXPANDB X16, K1, X6                              // 62b27d0962f0
	VPEXPANDB X28, K1, X6                              // 62927d0962f4
	VPEXPANDB X8, K1, X6                               // 62d27d0962f0
	VPEXPANDB 99(R15)(R15*4), K1, X6                   // 62927d096274bf63

	MOVD	m_curg(R6), R5
	CMP		g, R5
	BNE		noswitch

	MOVD	m_g0(R6), R4
	MOVD	(g_sched+gobuf_sp)(R4), R15	// Set SP to g0 stack

noswitch:
	SUB		$16, R15		// reserve 2x 8 bytes for parameters
	MOVD	$~7, R4			// align to 8 bytes because of gcc ABI
	AND		R4, R15
	MOVD	R15, R3			// R15 needs to be in R3 as expected by kernel_clock_gettime

	MOVB	runtime·iscgo(SB),R12
	CMPBNE	R12, $0, nosaveg

	VAESDEC 99(R15)(R15*1), Y0, Y23                    // 62827d28debc3f63000000 or 6282fd28debc3f63000000
	VAESDEC (DX), Y0, Y23                              // 62e27d28de3a or 62e2fd28de3a
	VAESDEC Z27, Z3, Z11                               // 62126548dedb or 6212e548dedb
	VAESDEC Z15, Z3, Z11                               // 62526548dedf or 6252e548dedf

	VMOVDQU16 Z8, K4, (CX)                             // 6271ff4c7f01
	VMOVDQU16 Z6, K4, 99(R15)                          // 62d1ff4c7fb763000000
	VMOVDQU16 Z8, K4, 99(R15)                          // 6251ff4c7f8763000000
	VMOVDQU16 Z12, K1, Z25                             // 6211ff497fe1
	VMOVDQU16 Z17, K1, Z25                             // 6281ff497fc9
	VMOVDQU16 99(R15)(R15*2), K1, Z25                  // 6201ff496f8c7f63000000

TEXT	racecall<>(SB), NOSPLIT, $0-0
	BL	runtime·save_g(SB)		// Save g for callbacks.
	MOVD	R15, R7				// Save SP.
	MOVD	g_m(g), R8			// R8 = thread.
	MOVD	m_g0(R8), R8			// R8 = g0.
	CMPBEQ	R8, g, call			// Already on g0?
	MOVD	(g_sched+gobuf_sp)(R8), R15	// Switch SP to g0.
call:	SUB	$160, R15			// Allocate C frame.
	BL	R1				// Call C code.
	MOVD	R7, R15				// Restore SP.
	RET					// Return to Go.