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Results 11 - 20 of 257 for mem0 (0.2 sec)
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src/cmd/compile/internal/ssa/rewritegeneric.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Apr 22 18:24:47 UTC 2024 - 812.2K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/check.go
if f.scheduled { for _, b := range f.Blocks { var mem *Value // the current live memory in the block for _, v := range b.Values { if v.Op == OpPhi { if v.Type.IsMemory() { mem = v } continue } if mem == nil && len(b.Preds) > 0 { // If no mem phi, take mem of any predecessor. mem = lastmem[b.Preds[0].b.ID] } for _, a := range v.Args {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 09 16:41:23 UTC 2024 - 17.6K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteLOONG64.go
v.AddArg2(ptr, mem) return true } // match: (Load <t> ptr mem) // cond: (is16BitInt(t) && t.IsSigned()) // result: (MOVHload ptr mem) for { t := v.Type ptr := v_0 mem := v_1 if !(is16BitInt(t) && t.IsSigned()) { break } v.reset(OpLOONG64MOVHload) v.AddArg2(ptr, mem) return true } // match: (Load <t> ptr mem)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Nov 21 19:26:25 UTC 2023 - 195.8K bytes - Viewed (0) -
misc/wasm/wasm_exec.js
const setInt64 = (addr, v) => { this.mem.setUint32(addr + 0, v, true); this.mem.setUint32(addr + 4, Math.floor(v / 4294967296), true); } const setInt32 = (addr, v) => { this.mem.setUint32(addr + 0, v, true); } const getInt64 = (addr) => { const low = this.mem.getUint32(addr + 0, true); const high = this.mem.getInt32(addr + 4, true); return low + high * 4294967296;
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon May 22 17:47:47 UTC 2023 - 16.3K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/func_test.go
{ cfg.Fun("entry", Bloc("entry", Valu("mem", OpInitMem, types.TypeMem, 0, nil), Goto("exit")), Bloc("exit", Exit("mem"))), cfg.Fun("entry", Bloc("entry", Valu("mem", OpInitMem, types.TypeMem, 0, nil), Exit("mem"))), }, // value order changed { cfg.Fun("entry", Bloc("entry", Valu("mem", OpInitMem, types.TypeMem, 0, nil),
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Sep 08 19:01:04 UTC 2023 - 13.1K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/ARM64Ops.go
{name: "MOVWstoreidx", argLength: 4, reg: gpstore2, asm: "MOVW", typ: "Mem"}, // store 4 bytes of arg2 to arg0 + arg1, arg3 = mem. {name: "MOVDstoreidx", argLength: 4, reg: gpstore2, asm: "MOVD", typ: "Mem"}, // store 8 bytes of arg2 to arg0 + arg1, arg3 = mem. {name: "FMOVSstoreidx", argLength: 4, reg: fpstore2, asm: "FMOVS", typ: "Mem"}, // store 32-bit float of arg2 to arg0 + arg1, arg3=mem.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 58.8K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/AMD64splitload.rules
(CMPWconstload {sym} [vo] ptr mem) && vo.Val() != 0 => (CMPWconst (MOVWload {sym} [vo.Off()] ptr mem) [vo.Val16()]) (CMPBconstload {sym} [vo] ptr mem) && vo.Val() != 0 => (CMPBconst (MOVBload {sym} [vo.Off()] ptr mem) [vo.Val8()]) (CMP(Q|L|W|B)loadidx1 {sym} [off] ptr idx x mem) => (CMP(Q|L|W|B) (MOV(Q|L|W|B)loadidx1 {sym} [off] ptr idx mem) x) (CMPQloadidx8 {sym} [off] ptr idx x mem) => (CMPQ (MOVQloadidx8 {sym} [off] ptr idx mem) x)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Oct 04 19:35:46 UTC 2022 - 3.4K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/dec.rules
(StringLen x:(Load <t> ptr mem)) && t.IsString() => @x.Block (Load <typ.Int> (OffPtr <typ.IntPtr> [config.PtrSize] ptr) mem) // NOTE removed must-not-be-SSA condition. (StructSelect [i] x:(Load <t> ptr mem)) => @x.Block (Load <v.Type> (OffPtr <v.Type.PtrTo()> [t.FieldOff(int(i))] ptr) mem) (ITab x:(Load <t> ptr mem)) && t.IsInterface() => @x.Block (Load <typ.Uintptr> ptr mem)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 12 00:48:31 UTC 2023 - 6.9K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/Wasm.rules
(Store {t} ptr val mem) && t.Size() == 2 => (I64Store16 ptr val mem) (Store {t} ptr val mem) && t.Size() == 1 => (I64Store8 ptr val mem) // Lowering moves (Move [0] _ _ mem) => mem (Move [1] dst src mem) => (I64Store8 dst (I64Load8U src mem) mem) (Move [2] dst src mem) => (I64Store16 dst (I64Load16U src mem) mem) (Move [4] dst src mem) => (I64Store32 dst (I64Load32U src mem) mem)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Feb 17 03:56:57 UTC 2023 - 16.9K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/ARMOps.go
{name: "MOVWstore", argLength: 3, reg: gpstore, aux: "SymOff", asm: "MOVW", typ: "Mem", faultOnNilArg0: true, symEffect: "Write"}, // store 4 bytes of arg1 to arg0 + auxInt + aux. arg2=mem. {name: "MOVFstore", argLength: 3, reg: fpstore, aux: "SymOff", asm: "MOVF", typ: "Mem", faultOnNilArg0: true, symEffect: "Write"}, // store 4 bytes of arg1 to arg0 + auxInt + aux. arg2=mem.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Feb 24 00:21:13 UTC 2023 - 41K bytes - Viewed (0)