xk *uint32, dst, src *byte) TEXT ·encryptBlockAsm(SB), NOSPLIT|NOFRAME, $0 MOVD nr+0(FP), R6 // Round count/Key size MOVD xk+8(FP), R5 // Key pointer MOVD dst+16(FP), R3 // Dest pointer MOVD src+24(FP), R4 // Src pointer SETUP_ESPERM(R7) // Set CR{1,2,3}EQ to hold the key size information. CMPU R6, $10, CR1 CMPU R6, $12, CR2 CMPU R6, $14, CR3 MOVD $16, R6 MOVD $32, R7 MOVD $48, R8 MOVD $64, R9 MOVD $80, R10 MOVD $96, R11 MOVD $112, R12 // Load text in BE order P8_LXVB16X(R4, R0, V0) // V1, V2 will...

	MOVBU	R4, name(SB)		// 1e00001ac4030029
	MOVF	F4, name(SB)		// 1e00001ac403402b
	MOVD	F4, name(SB)		// 1e00001ac403c02b
	MOVW	name(SB), R4		// 1e00001ac4038028
	MOVWU	name(SB), R4		// 1e00001ac403802a
	MOVV	name(SB), R4		// 1e00001ac403c028
	MOVB	name(SB), R4		// 1e00001ac4030028
	MOVBU	name(SB), R4		// 1e00001ac403002a
	MOVF	name(SB), F4		// 1e00001ac403002b
	MOVD	name(SB), F4		// 1e00001ac403802b
	MOVH	R4, name(SB)		// 1e00001ac4034029

	BNE	R0, R4, 1(PC)		// 80040044
	BLTU	R4, 1(PC)		// 80040068
	MOVF	y+8(FP), F4		// 6440002b
	MOVD	y+8(FP), F4		// 6440802b
	MOVF	1(F5), F4		// a404002b
	MOVD	1(F5), F4		// a404802b
	MOVF	F4, result+16(FP)	// 6460402b
	MOVD	F4, result+16(FP)	// 6460c02b
	MOVF	F4, 1(F5)		// a404402b
	MOVD	F4, 1(F5)		// a404c02b
	MOVW	R4, F5			// 85a41401
	MOVW	F4, R5			// 85b41401
	MOVV	R4, F5			// 85a81401

	MOVF	4(X5), F0				// 07a04200
	MOVF	F0, 4(X5)				// 27a20200
	MOVF	F0, F1					// d3000020

	MOVD	4(X5), F0				// 07b04200
	MOVD	F0, 4(X5)				// 27b20200
	MOVD	F0, F1					// d3000022

	// Convert to load of symbol (AUIPC + FLD)
	MOVD	$(709.78271289338397), F3		// 970f000087b10f00

	// TLS load with local-exec (LUI + ADDIW + ADD of TP + load)

	instructions["JPS"] = x86.AJPS  /* parity set (PF = 1) */
	instructions["JS"] = x86.AJMI   /* alternate */
	instructions["JZ"] = x86.AJEQ   /* alternate */
	instructions["MASKMOVDQU"] = x86.AMASKMOVOU
	instructions["MOVD"] = x86.AMOVQ
	instructions["MOVDQ2Q"] = x86.AMOVQ
	instructions["MOVNTDQ"] = x86.AMOVNTO
	instructions["MOVOA"] = x86.AMOVO
	instructions["PSLLDQ"] = x86.APSLLO
	instructions["PSRLDQ"] = x86.APSRLO

</p>

<p>
It is currently supported on arm64, amd64, ppc64, loong64 and riscv64.

For example, the start of the <code>MOVD</code> instruction below is aligned to 32 bytes:
<pre>
PCALIGN $32
MOVD $2, R0
</pre>
</p>

<h3 id="data-offsets">Interacting with Go types and constants</h3>

<p>
If a package has any .s files, then <code>go build</code> will direct

	MOVBU	X5, (X6)			// ERROR "unsupported unsigned store"
	MOVHU	X5, (X6)			// ERROR "unsupported unsigned store"
	MOVWU	X5, (X6)			// ERROR "unsupported unsigned store"
	MOVF	F0, F1, F2			// ERROR "illegal MOV instruction"
	MOVD	F0, F1, F2			// ERROR "illegal MOV instruction"
	MOV	X10, X11, X12			// ERROR "illegal MOV instruction"
	MOVW	X10, X11, X12			// ERROR "illegal MOV instruction"
	RORI	$64, X5, X6			// ERROR "immediate out of range 0 to 63"