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Results 11 - 20 of 47 for CX (0.04 sec)
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lib/fips140/v1.0.0.zip
MOVUPS (CX), X0 AESENC X0, X1 AESENC X0, X2 MOVUPS 16(CX), X0 AESENC X0, X1 AESENC X0, X2 ADDQ $0x20, CX enc128: MOVUPS (CX), X0 AESENC X0, X1 AESENC X0, X2 MOVUPS 16(CX), X0 AESENC X0, X1 AESENC X0, X2 MOVUPS 32(CX), X0 AESENC X0, X1 AESENC X0, X2 MOVUPS 48(CX), X0 AESENC X0, X1 AESENC X0, X2 MOVUPS 64(CX), X0 AESENC X0, X1 AESENC X0, X2 MOVUPS 80(CX), X0 AESENC X0, X1 AESENC X0, X2 MOVUPS 96(CX), X0 AESENC X0, X1 AESENC X0, X2 MOVUPS 112(CX), X0 AESENC X0, X1 AESENC X0, X2 MOVUPS 128(CX), X0 AESENC...
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Wed Jan 29 15:10:35 UTC 2025 - 635K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/avx512enc/avx512_vbmi2.s
VPCOMPRESSB X13, K1, X28 // 62127d0963ec VPCOMPRESSB X8, K1, X28 // 62127d0963c4 VPCOMPRESSB X7, K1, -7(CX)(DX*1) // 62f27d09637c11f9 VPCOMPRESSB X13, K1, -7(CX)(DX*1) // 62727d09636c11f9 VPCOMPRESSB X8, K1, -7(CX)(DX*1) // 62727d09634411f9 VPCOMPRESSB X7, K1, -15(R14)(R15*4) // 62927d09637cbef1
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Tue May 22 14:57:15 UTC 2018 - 97.1K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/avx512enc/avx512er.s
VRCP28PD Z2, K2, Z5 // 62f2fd4acaea VRCP28PD -7(CX)(DX*1), K2, Z5 // 62f2fd4acaac11f9ffffff VRCP28PD -15(R14)(R15*4), K2, Z5 // 6292fd4acaacbef1ffffff VRCP28PD Z2, K2, Z23 // 62e2fd4acafa VRCP28PD -7(CX)(DX*1), K2, Z23 // 62e2fd4acabc11f9ffffff
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Tue May 22 14:57:15 UTC 2018 - 28.4K bytes - Viewed (0) -
src/cmd/asm/internal/asm/operand_test.go
{"$~15", "$-16"}, {"(((8)&0xf)*4)(SP)", "32(SP)"}, {"(((8-14)&0xf)*4)(SP)", "40(SP)"}, {"(6+8)(AX)", "14(AX)"}, {"(8*4)(BP)", "32(BP)"}, {"(AX)", "(AX)"}, {"(AX)(CX*8)", "(AX)(CX*8)"}, {"(BP)(CX*4)", "(BP)(CX*4)"}, {"(BP)(DX*4)", "(BP)(DX*4)"}, {"(BP)(R8*4)", "(BP)(R8*4)"}, {"(BX)", "(BX)"}, {"(DI)", "(DI)"}, {"(DI)(BX*1)", "(DI)(BX*1)"}, {"(DX)", "(DX)"}, {"(R9)", "(R9)"},
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Tue Aug 29 18:31:05 UTC 2023 - 23.9K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/avx512enc/aes_avx512f.s
VAESDECLAST X1, X31, X9 // 62720500dfc9 or 62728500dfc9 VAESDECLAST X11, X31, X9 // 62520500dfcb or 62528500dfcb VAESDECLAST -7(CX), X31, X9 // 62720500df89f9ffffff or 62728500df89f9ffffff VAESDECLAST 15(DX)(BX*4), X31, X9 // 62720500df8c9a0f000000 or 62728500df8c9a0f000000
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Tue May 22 14:57:15 UTC 2018 - 29K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/amd64dynlinkerror.s
CMPL runtime·writeBarrier(SB), $0 MOVQ (CX)(R15*1), AX // ERROR "when dynamic linking, R15 is clobbered by a global variable access and is used here" RET TEXT ·a19(SB), 0, $0-0 CMPL runtime·writeBarrier(SB), $0 MOVQ AX, (R15) // ERROR "when dynamic linking, R15 is clobbered by a global variable access and is used here" RET TEXT ·a20(SB), 0, $0-0 CMPL runtime·writeBarrier(SB), $0
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Wed Mar 15 20:45:41 UTC 2023 - 4.8K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/avx512enc/gfni_avx512f.s
VGF2P8AFFINEQB $126, -7(CX)(DX*4), Y12, K2, Y0 // 62f39d2ace8491f9ffffff7e VGF2P8AFFINEQB $126, Y17, Y1, K2, Y0 // 62b3f52acec17e VGF2P8AFFINEQB $126, Y7, Y1, K2, Y0 // 62f3f52acec77e VGF2P8AFFINEQB $126, Y9, Y1, K2, Y0 // 62d3f52acec17e VGF2P8AFFINEQB $126, 15(R8)(R14*4), Y1, K2, Y0 // 6293f52ace84b00f0000007e
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Tue May 22 14:57:15 UTC 2018 - 22.6K bytes - Viewed (0) -
doc/asm.html
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Tue Nov 28 19:15:27 UTC 2023 - 36.3K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/avx512enc/avx512_bitalg.s
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Tue May 22 14:57:15 UTC 2018 - 10.4K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/386.s
SHLL $4, foo+4(SB) SHLL $4, foo+4(SB):AX // SHLL $4, AX, foo+4(SB) // LTYPEM spec6 { outcode(int($1), &$2); } MOVL AX, BX MOVL $4, BX // LTYPEI spec7 { outcode(int($1), &$2); } IMULL AX IMULL $4, CX IMULL AX, BX // LTYPEXC spec9 { outcode(int($1), &$2); } CMPPD X0, X1, 4 CMPPD foo+4(SB), X1, 4 // LTYPEX spec10 { outcode(int($1), &$2); } PINSRD $1, (AX), X0 PINSRD $2, foo+4(FP), X0
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Tue Apr 09 18:57:21 UTC 2019 - 2K bytes - Viewed (0)