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Results 11 - 20 of 71 for auxInt8 (0.24 sec)
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src/cmd/compile/internal/ssa/rewritePPC64latelower.go
for { a := auxIntToInt32(v.AuxInt) x := v_0 if v_1.Op != OpPPC64MOVDconst || auxIntToInt64(v_1.AuxInt) != 0 { break } z := v_2 v.reset(OpPPC64ISELZ) v.AuxInt = int32ToAuxInt(a) v.AddArg2(x, z) return true } // match: (ISEL [a] (MOVDconst [0]) y z) // result: (ISELZ [a^0x4] y z) for { a := auxIntToInt32(v.AuxInt)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 19:59:38 UTC 2024 - 16.5K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteARM.go
x := v_0.Args[0] v.reset(OpARMADDconst) v.AuxInt = int32ToAuxInt(c - d) v.AddArg(x) return true } // match: (ADDconst [c] (RSBconst [d] x)) // result: (RSBconst [c+d] x) for { c := auxIntToInt32(v.AuxInt) if v_0.Op != OpARMRSBconst { break } d := auxIntToInt32(v_0.AuxInt) x := v_0.Args[0] v.reset(OpARMRSBconst)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Nov 20 17:19:36 UTC 2023 - 486.8K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteAMD64.go
// result: (MOVLconst [c+d]) for { c := auxIntToInt32(v.AuxInt) if v_0.Op != OpAMD64MOVLconst { break } d := auxIntToInt32(v_0.AuxInt) v.reset(OpAMD64MOVLconst) v.AuxInt = int32ToAuxInt(c + d) return true } // match: (ADDLconst [c] (ADDLconst [d] x)) // result: (ADDLconst [c+d] x) for { c := auxIntToInt32(v.AuxInt) if v_0.Op != OpAMD64ADDLconst { break }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 12 19:38:41 UTC 2024 - 712.7K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewritegeneric.go
for { for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 { if v_0.Op != OpConst16 { continue } c := auxIntToInt16(v_0.AuxInt) if v_1.Op != OpConst16 { continue } d := auxIntToInt16(v_1.AuxInt) v.reset(OpConst16) v.AuxInt = int16ToAuxInt(c + d) return true } break } // match: (Add16 <t> (Mul16 x y) (Mul16 x z)) // result: (Mul16 x (Add16 <t> y z))
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Apr 22 18:24:47 UTC 2024 - 812.2K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/ARM64Ops.go
{name: "RORWconst", argLength: 1, reg: gp11, asm: "RORW", aux: "Int64"}, // uint32(arg0) right rotate by auxInt bits, auxInt should be in the range 0 to 31. {name: "EXTRconst", argLength: 2, reg: gp21, asm: "EXTR", aux: "Int64"}, // extract 64 bits from arg0:arg1 starting at lsb auxInt, auxInt should be in the range 0 to 63.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 58.8K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteLOONG64.go
for { val := auxIntToInt16(v.AuxInt) v.reset(OpLOONG64MOVVconst) v.AuxInt = int64ToAuxInt(int64(val)) return true } } func rewriteValueLOONG64_OpConst32(v *Value) bool { // match: (Const32 [val]) // result: (MOVVconst [int64(val)]) for { val := auxIntToInt32(v.AuxInt) v.reset(OpLOONG64MOVVconst) v.AuxInt = int64ToAuxInt(int64(val)) return true } }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Nov 21 19:26:25 UTC 2023 - 195.8K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/ARMOps.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Feb 24 00:21:13 UTC 2023 - 41K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteMIPS64.go
v6.AuxInt = int64ToAuxInt(3) v7 := b.NewValue0(v.Pos, OpMIPS64XORconst, typ.UInt64) v7.AuxInt = int64ToAuxInt(3) v7.AddArg(ptr) v6.AddArg(v7) v5.AddArg(v6) v3.AddArg2(v4, v5) v8 := b.NewValue0(v.Pos, OpMIPS64NORconst, typ.UInt64) v8.AuxInt = int64ToAuxInt(0) v9 := b.NewValue0(v.Pos, OpMIPS64SLLV, typ.UInt64) v10 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64) v10.AuxInt = int64ToAuxInt(0xff)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Jul 31 03:59:48 UTC 2023 - 211.6K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteRISCV64.go
for { val := auxIntToInt16(v.AuxInt) v.reset(OpRISCV64MOVDconst) v.AuxInt = int64ToAuxInt(int64(val)) return true } } func rewriteValueRISCV64_OpConst32(v *Value) bool { // match: (Const32 [val]) // result: (MOVDconst [int64(val)]) for { val := auxIntToInt32(v.AuxInt) v.reset(OpRISCV64MOVDconst) v.AuxInt = int64ToAuxInt(int64(val)) return true } }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Mar 07 14:57:07 UTC 2024 - 205.1K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteMIPS.go
v7 := b.NewValue0(v.Pos, OpMIPSXORconst, typ.UInt32) v7.AuxInt = int32ToAuxInt(3) v7.AddArg(ptr) v6.AddArg(v7) v5.AddArg(v6) v3.AddArg2(v4, v5) v8 := b.NewValue0(v.Pos, OpMIPSNORconst, typ.UInt32) v8.AuxInt = int32ToAuxInt(0) v9 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32) v10 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32) v10.AuxInt = int32ToAuxInt(0xff) v9.AddArg2(v10, v5)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 24 14:43:03 UTC 2023 - 176.6K bytes - Viewed (0)