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tensorflow/compiler/jit/shape_inference.cc
// Merge node causes a loop so we remove NextIteration->Merge edge before // performing shape inference. But removing those edges also prevents us // from inferring output shape for Merge node (we need shapes for all its // inputs). // For loop invariant resource input's Merge node, we set output resource // shape as Enter node's resource shape. // TODO(b/129367850): clean this up.
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri May 31 00:41:19 UTC 2024 - 13K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/flatbuffer2mlir/lstm.json
{ "tensors": [ { "shape": [1, 5, 2], "name": "input0" }, { "shape": [2, 5], "buffer": 1, "name": "input2input_weights1" }, { "shape": [2, 5], "buffer": 2, "name": "input2forget_weights2" }, { "shape": [2, 5], "buffer": 3,
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed May 01 06:25:50 UTC 2024 - 9.1K bytes - Viewed (0) -
tensorflow/compiler/mlir/tfr/tests/end2end.mlir
// CHECK-NEXT: %[[SHAPE:.*]] = "tf.RiscShape"(%arg0) {T = i32} : (tensor<2x3xf32>) -> tensor<*xi32> // CHECK-NEXT: %[[ALPHA1:.*]] = "tf.RiscBroadcast"(%[[ALPHA]], %[[SHAPE]]) : (tensor<f32>, tensor<*xi32>) -> tensor<*xf32> // CHECK-NEXT: %[[MAX:.*]] = "tf.RiscMaximum"(%arg0, %[[ALPHA1]]) : (tensor<2x3xf32>, tensor<*xf32>) -> tensor<*xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 13.4K bytes - Viewed (0) -
tensorflow/compiler/jit/xla_host_send_device_context.h
// se::DeviceMemoryBase gpu_dst{device_tensor.data(), 4 * sizeof(float)}; // xla::Shape shape(xla::F32, {2, 2}, {}, {}) // tsl::AsyncValueRef<std::unique_ptr<se::Event>> done_event = // tsl::MakeConstructedAsyncValueRef<std::unique_ptr<se::Event>>(stream.parent()); // done_event->Init(); // // XlaHostSendDeviceContext device_context(&stream, &gpu_dst, // shape, done_event); // device_context.CopyCPUTensorToDeviceSync(
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri May 17 22:46:36 UTC 2024 - 3.7K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/prepare_tpu_computation_for_tf_export.mlir
// CHECK-SAME: recv_key = "host_compute_channel_recv" // CHECK-SAME: send_key = "host_compute_channel_send" // CHECK-SAME: shape_inference_graph = @host_func // CHECK-SAME: shapes = [#tf_type.shape<*>, #tf_type.shape<3x?>] // CHECK-SAME: tpu_core = 0 : i64 // CHECK: func @host_func // CHECK: %[[RECV_OUTPUT:[0-9]*]]:2 = "tf._XlaRecvAtHost" // CHECK-SAME: key = "host_compute_channel_send"
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Feb 14 18:46:36 UTC 2024 - 9.2K bytes - Viewed (0) -
tensorflow/c/eager/abstract_tensor_handle.cc
namespace tensorflow { std::string AbstractTensorHandle::DebugString() const { PartialTensorShape shape; Status s = Shape(&shape); std::string shape_string; if (!s.ok()) { shape_string = "<error computing shape>"; } else { shape_string = shape.DebugString(); } return absl::StrCat("TensorHandle(shape=", shape_string, ", dtype=", DataType_Name(DataType()),
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Feb 15 09:49:45 UTC 2024 - 1.4K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/utils/convert_tensor.h
// Converts a shape from MLIR to a TensorFlow tensor shape proto. void ConvertToTensorShapeProto(llvm::ArrayRef<int64_t> shape, TensorShapeProto* output_shape); // Converts an MLIR type to a TensorFlow tensor shape. PartialTensorShape ConvertTypeToTensorShape(const mlir::Type& type); // Converts an MLIR shaped type to a TensorFlow shape attribute.
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri Apr 26 09:37:10 UTC 2024 - 2.9K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/flatbuffer2mlir/multi_output_op.json
{ "builtin_code": "SPLIT" } ], "subgraphs": [ { "tensors": [ { "shape": [ 1 ], "name": "split_dim", "quantization": { } }, { "shape": [ 256, 32, 32, 3 ], "name": "input",
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Sat Dec 03 00:08:31 UTC 2022 - 1.7K bytes - Viewed (0) -
src/runtime/pprof/protomem_test.go
const expectedLocation = "runtime/pprof.nonRecursiveGenericAllocFunction[go.shape.struct {},go.shape.struct { runtime/pprof.buf [128]uint8 }];runtime/pprof.nonRecursiveGenericAllocFunction[go.shape.struct...
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue May 21 14:38:45 UTC 2024 - 6.7K bytes - Viewed (0) -
tensorflow/compiler/mlir/tf2xla/tests/legalize-tf-BatchMatMulV2.mlir
// CHECK: [[LHSSHAPE:%.*]] = shape.shape_of [[LHS]] : tensor<1x4x2xf32> // CHECK: [[RHSSHAPE:%.*]] = shape.shape_of [[RHS]] : tensor<3x2x4xf32> // CHECK: [[CM2:%.*]] = arith.constant -2 : index // CHECK: [[LHSHEAD:%.*]], [[LHSTAIL:%.*]] = "shape.split_at"([[LHSSHAPE]], [[CM2]]) // CHECK: [[RHSHEAD:%.*]], [[RHSTAIL:%.*]] = "shape.split_at"([[RHSSHAPE]], [[CM2]])
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Sat Apr 06 15:32:52 UTC 2024 - 5.5K bytes - Viewed (0)