Example:
      %device_tensor = gpurt.transfer_to_device %cpu_tensor
  }];

  let arguments = (ins TFTensorType);
  let results = (outs TFTensorType);
  let assemblyFormat = "operands attr-dict";
}

// TODO(b/260267885): We may add a device argument when we want to support
// GPU MIG.
def TransferFromDeviceOp: Gpu_Op<"transfer_from_device"> {
  let summary = "Transfer a tensor from device.";

      state.addRegion()->takeBody(region);
    }
    // Assign existing operands for item.
    operands.assign(item.operand_begin(), item.operand_end());

    // Collect defining ops for existing operands.
    defining_ops.clear();
    for (Value operand : operands) {
      defining_ops.insert(operand.getDefiningOp());
    }
    for (Value new_control_input : llvm::reverse(new_control_inputs_for_item)) {

  if (!IsIllegalType(v.getType())) {
    return true;
  }
  if (v.getUsers().empty()) {
    return false;
  }
  return llvm::all_of(v.getUsers(), [&](OpOperand operand) {
    return IsQintToIntCast(operand.getOwner());
  });
}

// Check if an op operand value is defined by int -> qint TF Cast OP.
bool IsQintValueDefinedByIntToQintCast(Value v) {
  if (!IsIllegalType(v.getType())) {
    return true;
  }

  let arguments = (ins
    Variadic<TFTensorType>,
    StrAttr:$node_def,
    I32Attr:$op_key
  );

  let results = (outs Variadic<TFTensorType>);

  let assemblyFormat = "`(`operands`)` attr-dict `:` functional-type(operands, results)";
}


def ConvertDhtToFallbackTensorOp : FallbackSync_Op<"convert_dht_to_fallback_tensor",
    [CoreRT_TypedAttributeTrait]> {
  let summary = "convert a DHT to a fallback tensor";

void UpdateStatesAndReplaceStablehloOps(
    const SetVector<Value>& operands, const SetVector<Value>& defined_values,
    const LiveOuts& liveouts, ModuleOp module_op,
    const SetVector<Operation*>& reverse_subgraph, const int stablehlo_func_id,
    func::FuncOp main_func, const bool is_last_subgraph = false) {
  SetVector<Value> inputs = operands;
  for (Value defined_value : defined_values) {
    inputs.remove(defined_value);

  }
}

// Visits all operands of an op where each operand is an output of an Operation
// in the same tf_executor.graph.
void VisitOpOperands(GraphOp graph, Operation* op,
                     llvm::SmallPtrSetImpl<Operation*>* reachable_ops,
                     llvm::SmallVectorImpl<Operation*>* ops_to_visit) {
  for (Value operand : op->getOperands())
    VisitOpOperand(graph, operand, reachable_ops, ops_to_visit);
}

// TODO(fengliuai): supports a configurable accumulator bit width.
template <int Bias, int... Operands>
class AccumulatorUniformScale {
 public:
  template <typename ConcreteType>
  class Impl
      : public QuantizationSpecTraitBase<
            ConcreteType, AccumulatorUniformScale<Bias, Operands...>::Impl> {
   public:
    // Whether the index-th operand is a bias.
    static bool IsBias(int index) { return index == Bias; }

  for (auto operand : forward_caller->getOperands()) {
    if (llvm::isa<BlockArgument>(operand)) {
      // Pull this from the original operands to the original while op.
      auto arg = llvm::cast<BlockArgument>(operand);
      f_operands.push_back(loop_operands[arg.getArgNumber()]);
      continue;
    }
    auto src = operand.getDefiningOp();

      if (is_op_a && *result_constraint == ValueConstraint::kShape)
        operands.Insert(op->getOperand(0), ValueConstraint::kRank);

      // `test.OpB` converts value constraint to shape constraint.
      if (*result_constraint == ValueConstraint::kValue)
        operands.Insert(op->getOperand(0), ValueConstraint::kShape);
    }

    return success();
  }
};

 public:
  using TensorflowDataflowAnalysis<
      ResourceConstructingOps>::TensorflowDataflowAnalysis;
  void visitOperation(Operation *op, ArrayRef<const StateT *> operands,
                      ArrayRef<StateT *> results) override {
    if (ForwardThroughTFOperation(op, operands, results)) return;
    setAllToEntryStates(results);
  }
  ~ResourceDataflowAnalysis() override = default;
};

class IsCompositeDataflowAnalysis