op->getLoc(), op.getOperand().getType(), adaptor.getOperand());
      rewriter.replaceOpWithNewOp<mlir::stablehlo::BitcastConvertOp>(
          op, op.getResult().getType(), output);
    } else {
      // Both input/output are f32. Convert to no-op.
      rewriter.replaceOp(op, adaptor.getOperand());
    }
    return success();
  }
};
}  // namespace

#define GEN_PASS_DEF_CONVERTFUNCTOBFLOAT16PASS

BenchmarkLRUGetConcurrent-8      	 1000000	      1984 ns/op	       0 B/op	       0 allocs/op
BenchmarkLRUSet-8                	20000000	        64.7 ns/op	       0 B/op	       0 allocs/op
BenchmarkLRUSetConcurrent-8      	 1000000	      2315 ns/op	       0 B/op	       0 allocs/op
BenchmarkLRUGetSetConcurrent-8   	 1000000	      2299 ns/op	       0 B/op	       0 allocs/op

namespace mlir {
namespace TFL {
namespace tac {

// Returns true if 'op' is non const op. Returns false otherwise or if
// 'op' is null.
inline bool IsNonConstOp(Operation* op) {
  if (!op) return false;
  if (llvm::isa<arith::ConstantOp, mlir::func::ConstantOp>(op)) return false;
  if (op->hasTrait<OpTrait::ConstantLike>()) return false;
  if (llvm::isa<TFL::ConstOp, TFL::QConstOp>(op)) return false;
  return true;
}

  // `op`, and bypass all result transposes.
  Location loc = op->getLoc();

  // Move constant op defining result permutation to the beginning of the block.
  permutation_op.getOperation()->moveBefore(&op->getBlock()->front());

  // Bypass Transpose nodes for all results.
  for (OpResult result : op->getResults()) {
    result.setType(

    if (argumentOp && op->getName() == argumentOp->getName()) {
      // Replace the outer operation output with the inner operation.
      return op->getOperand(0);
    }
  } else if (op->getOperand(0) == op->getOperand(1)) {
    return op->getOperand(0);
  }

  return {};
}

inline LogicalResult verifyIsInvolution(Operation* op) {
  // TODO(b/246518997): Add back check for no side effects on operation.

	// result: x
	for {
		x := v_0
		if x.Op != OpARM64Equal {
			break
		}
		v.copyOf(x)
		return true
	}
	// match: (MOVBUreg x:(NotEqual _))
	// result: x
	for {
		x := v_0
		if x.Op != OpARM64NotEqual {
			break
		}
		v.copyOf(x)
		return true
	}
	// match: (MOVBUreg x:(LessThan _))
	// result: x
	for {
		x := v_0
		if x.Op != OpARM64LessThan {
			break
		}

#define TAC_REGISTER_CPU_OP(Op, Create)                                    \
  TargetHardwareOpRegistration<CpuHardware, Op> Op##_CpuHardware_hardware( \
      Create);

// Operation costs on CPU

// Currently used for these ops:
// tfl.conv_2d / tfl.depthwise_conv_2d / tfl.fully_connected
class CpuConvOp : public TargetHardwareOperation {
  double GetOpCost(mlir::Operation* op) const override {
    float cost = 0.0;

      builder.create<tf_device::ReturnOp>(op->getLoc(), op->getResults())
          .getOperation();
  MLIRContext* context = launch_op.getContext();
  op->removeAttr(StringAttr::get(context, kDeviceAttr));
  op->moveBefore(return_op);
}

void DeviceAttributeToLaunch::runOnOperation() {
  const Dialect* tf_dialect = getContext().getLoadedDialect("tf");

  getOperation().walk([&](Operation* op) {

  void runOnOperation() override;
};

// Returns whether op requires `device_ordinal` attribute.
bool RequiresDeviceOrdinalAttribute(Operation* op) {
  return (llvm::isa<TF::EnqueueTPUEmbeddingSparseTensorBatchOp,
                    TF::EnqueueTPUEmbeddingRaggedTensorBatchOp,
                    TF::EnqueueTPUEmbeddingArbitraryTensorBatchOp>(op) &&
          op->hasAttr(kDeviceOrdinalAttr) && op->hasAttr(kReplicaIdAttr));
}

// Checks if an op is inside a lifted function.
// If the given op pointer is a nullptr, returns false.
bool IsInLiftedFunc(Operation* op);

// Checks if the op is inside a StableHLO op with region.
// If the given op pointer is a nullptr, returns false.
bool IsInStableHloOpRegion(Operation* op);

// Checks if a given einsum op is supported for XlaDotV2 quantization.