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Results 11 - 20 of 43 for X6 (0.03 sec)

  1. src/internal/chacha8rand/chacha8_amd64.s

    loop:
    	QR(X0, X4, X8, X12, X15)
    	MOVOU X4, (4*16)(BX) // save X4
    	QR(X1, X5, X9, X13, X15)
    	MOVOU (15*16)(BX), X15 // reload X15; temp now X4
    	QR(X2, X6, X10, X14, X4)
    	QR(X3, X7, X11, X15, X4)
    
    	QR(X0, X5, X10, X15, X4)
    	MOVOU X15, (15*16)(BX) // save X15
    	QR(X1, X6, X11, X12, X4)
    	MOVOU (4*16)(BX), X4  // reload X4; temp now X15
    	QR(X2, X7, X8, X13, X15)
    	QR(X3, X4, X9, X14, X15)
    
    	DECL DX
    	JNZ loop
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Dec 05 20:34:30 UTC 2023
    - 4.6K bytes
    - Viewed (0)
  2. src/crypto/md5/md5block.go

    		x1 := byteorder.LeUint32(q[4*0x1:])
    		x2 := byteorder.LeUint32(q[4*0x2:])
    		x3 := byteorder.LeUint32(q[4*0x3:])
    		x4 := byteorder.LeUint32(q[4*0x4:])
    		x5 := byteorder.LeUint32(q[4*0x5:])
    		x6 := byteorder.LeUint32(q[4*0x6:])
    		x7 := byteorder.LeUint32(q[4*0x7:])
    		x8 := byteorder.LeUint32(q[4*0x8:])
    		x9 := byteorder.LeUint32(q[4*0x9:])
    		xa := byteorder.LeUint32(q[4*0xa:])
    		xb := byteorder.LeUint32(q[4*0xb:])
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon May 13 18:57:38 UTC 2024
    - 5.2K bytes
    - Viewed (0)
  3. src/internal/bytealg/equal_amd64.s

    hugeloop:
    	CMPQ	BX, $64
    	JB	bigloop
    	MOVOU	(SI), X0
    	MOVOU	(DI), X1
    	MOVOU	16(SI), X2
    	MOVOU	16(DI), X3
    	MOVOU	32(SI), X4
    	MOVOU	32(DI), X5
    	MOVOU	48(SI), X6
    	MOVOU	48(DI), X7
    	PCMPEQB	X1, X0
    	PCMPEQB	X3, X2
    	PCMPEQB	X5, X4
    	PCMPEQB	X7, X6
    	PAND	X2, X0
    	PAND	X6, X4
    	PAND	X4, X0
    	PMOVMSKB X0, DX
    	ADDQ	$64, SI
    	ADDQ	$64, DI
    	SUBQ	$64, BX
    	CMPL	DX, $0xffff
    	JEQ	hugeloop
    	XORQ	AX, AX	// return 0
    	RET
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Nov 17 16:34:40 UTC 2023
    - 2.8K bytes
    - Viewed (0)
  4. src/runtime/memmove_riscv64.s

    	// If less than 8 bytes, do single byte copies.
    	MOV	$8, X9
    	BLT	X12, X9, f_loop4_check
    
    	// Check alignment - if alignment differs we have to do one byte at a time.
    	AND	$7, X10, X5
    	AND	$7, X11, X6
    	BNE	X5, X6, f_loop8_unaligned_check
    	BEQZ	X5, f_loop_check
    
    	// Move one byte at a time until we reach 8 byte alignment.
    	SUB	X5, X9, X5
    	SUB	X5, X12, X12
    f_align:
    	SUB	$1, X5
    	MOVB	0(X11), X14
    	MOVB	X14, 0(X10)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Nov 09 13:57:06 UTC 2023
    - 5.5K bytes
    - Viewed (0)
  5. src/crypto/internal/nistec/p256_asm_amd64.s

    	MOVOU z1in(16*0), X13
    	MOVOU z1in(16*1), X14
    
    	PAND X15, X0
    	PAND X15, X1
    	PAND X15, X2
    	PAND X15, X3
    	PAND X15, X4
    	PAND X15, X5
    
    	PAND X6, X9
    	PAND X6, X10
    	PAND X6, X11
    	PAND X6, X12
    	PAND X6, X13
    	PAND X6, X14
    
    	PXOR X9, X0
    	PXOR X10, X1
    	PXOR X11, X2
    	PXOR X12, X3
    	PXOR X13, X4
    	PXOR X14, X5
    	// Similarly if zero == 0
    	PCMPEQL X9, X9
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 39.8K bytes
    - Viewed (0)
  6. src/runtime/asm_386.s

    	MOVOU	16(AX), X5
    	MOVOU	-32(AX)(BX*1), X6
    	MOVOU	-16(AX)(BX*1), X7
    
    	PXOR	X0, X4
    	PXOR	X1, X5
    	PXOR	X2, X6
    	PXOR	X3, X7
    
    	AESENC	X4, X4
    	AESENC	X5, X5
    	AESENC	X6, X6
    	AESENC	X7, X7
    
    	AESENC	X4, X4
    	AESENC	X5, X5
    	AESENC	X6, X6
    	AESENC	X7, X7
    
    	AESENC	X4, X4
    	AESENC	X5, X5
    	AESENC	X6, X6
    	AESENC	X7, X7
    
    	PXOR	X6, X4
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Mar 15 15:45:13 UTC 2024
    - 43.1K bytes
    - Viewed (0)
  7. src/cmd/compile/internal/ssa/opGen.go

    				{1, 65280}, // X0 X1 X2 X3 X4 X5 X6 X7
    			},
    			outputs: []outputInfo{
    				{0, 65280}, // X0 X1 X2 X3 X4 X5 X6 X7
    			},
    		},
    	},
    	{
    		name:         "SUBSD",
    		argLen:       2,
    		resultInArg0: true,
    		asm:          x86.ASUBSD,
    		reg: regInfo{
    			inputs: []inputInfo{
    				{0, 65280}, // X0 X1 X2 X3 X4 X5 X6 X7
    				{1, 65280}, // X0 X1 X2 X3 X4 X5 X6 X7
    			},
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 1M bytes
    - Viewed (0)
  8. src/runtime/preempt_riscv64.s

    // Code generated by mkpreempt.go; DO NOT EDIT.
    
    #include "go_asm.h"
    #include "textflag.h"
    
    TEXT ·asyncPreempt(SB),NOSPLIT|NOFRAME,$0-0
    	MOV X1, -464(X2)
    	SUB $464, X2
    	MOV X5, 8(X2)
    	MOV X6, 16(X2)
    	MOV X7, 24(X2)
    	MOV X8, 32(X2)
    	MOV X9, 40(X2)
    	MOV X10, 48(X2)
    	MOV X11, 56(X2)
    	MOV X12, 64(X2)
    	MOV X13, 72(X2)
    	MOV X14, 80(X2)
    	MOV X15, 88(X2)
    	MOV X16, 96(X2)
    	MOV X17, 104(X2)
    	MOV X18, 112(X2)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Nov 09 13:57:06 UTC 2023
    - 2.3K bytes
    - Viewed (0)
  9. src/crypto/aes/asm_amd64.s

    	SHUFPS $0x10, X0, X4
    	PXOR X4, X0
    	SHUFPS $0x8c, X0, X4
    	PXOR X4, X0
    	PXOR X1, X0
    
    	MOVAPS X2, X5
    	MOVAPS X2, X6
    	PSLLDQ $0x4, X5
    	PSHUFD $0xff, X0, X3
    	PXOR X3, X2
    	PXOR X5, X2
    
    	MOVAPS X0, X1
    	SHUFPS $0x44, X0, X6
    	MOVUPS X6, (BX)
    	SHUFPS $0x4e, X2, X1
    	MOVUPS X1, 16(BX)
    	ADDQ $32, BX
    	RET
    
    TEXT _expand_key_192b<>(SB),NOSPLIT,$0
    	PSHUFD $0x55, X1, X1
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 5.4K bytes
    - Viewed (0)
  10. src/runtime/asm_amd64.s

    	MOVOU	16(AX), X5
    	MOVOU	-32(AX)(CX*1), X6
    	MOVOU	-16(AX)(CX*1), X7
    
    	PXOR	X0, X4
    	PXOR	X1, X5
    	PXOR	X2, X6
    	PXOR	X3, X7
    
    	AESENC	X4, X4
    	AESENC	X5, X5
    	AESENC	X6, X6
    	AESENC	X7, X7
    
    	AESENC	X4, X4
    	AESENC	X5, X5
    	AESENC	X6, X6
    	AESENC	X7, X7
    
    	AESENC	X4, X4
    	AESENC	X5, X5
    	AESENC	X6, X6
    	AESENC	X7, X7
    
    	PXOR	X6, X4
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Sat May 11 20:38:24 UTC 2024
    - 60.4K bytes
    - Viewed (0)
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