package codegen

type T [2]*int // contain pointer, not SSA-able (so locals are not registerized)

var p1, p2, p3 T

func F() {
	// 3735936685 is 0xdeaddead. On ARM64 R27 is REGTMP.
	// clobber x, y at entry. not clobber z (stack object).
	// amd64:`MOVL\t\$3735936685, command-line-arguments\.x`, `MOVL\t\$3735936685, command-line-arguments\.y`, -`MOVL\t\$3735936685, command-line-arguments\.z`

	MOVD R17, 136(R1)
	MOVD R18, 144(R1)
	MOVD R19, 152(R1)
	MOVD R20, 160(R1)
	MOVD R21, 168(R1)
	MOVD R22, 176(R1)
	MOVD R23, 184(R1)
	MOVD R24, 192(R1)
	MOVD R25, 200(R1)
	MOVD R26, 208(R1)
	MOVD R27, 216(R1)
	MOVD R28, 224(R1)
	MOVD R29, 232(R1)
	MOVW CR, R31
	MOVW R31, 240(R1)
	MOVD XER, R31
	MOVD R31, 248(R1)
	FMOVD F0, 256(R1)
	FMOVD F1, 264(R1)
	FMOVD F2, 272(R1)
	FMOVD F3, 280(R1)

	MOVV R16, 104(R3)
	MOVV R17, 112(R3)
	MOVV R18, 120(R3)
	MOVV R19, 128(R3)
	MOVV R20, 136(R3)
	MOVV R21, 144(R3)
	MOVV R23, 152(R3)
	MOVV R24, 160(R3)
	MOVV R25, 168(R3)
	MOVV R26, 176(R3)
	MOVV R27, 184(R3)
	MOVV R28, 192(R3)
	MOVV R29, 200(R3)
	MOVV R31, 208(R3)
	MOVD F0, 216(R3)
	MOVD F1, 224(R3)
	MOVD F2, 232(R3)
	MOVD F3, 240(R3)
	MOVD F4, 248(R3)
	MOVD F5, 256(R3)
	MOVD F6, 264(R3)

	print("r22  ", hex(c.r22()), "\t")
	print("r23  ", hex(c.r23()), "\n")
	print("r24  ", hex(c.r24()), "\t")
	print("r25  ", hex(c.r25()), "\n")
	print("r26  ", hex(c.r26()), "\t")
	print("r27  ", hex(c.r27()), "\n")
	print("r28  ", hex(c.r28()), "\t")
	print("r29  ", hex(c.r29()), "\n")
	print("r30  ", hex(c.r30()), "\t")
	print("r31  ", hex(c.r31()), "\n")
	print("pc   ", hex(c.pc()), "\t")

	print("r22     ", hex(c.r22()), "\n")
	print("r23     ", hex(c.r23()), "\n")
	print("r24     ", hex(c.r24()), "\n")
	print("r25     ", hex(c.r25()), "\n")
	print("r26     ", hex(c.r26()), "\n")
	print("r27     ", hex(c.r27()), "\n")
	print("r28     ", hex(c.r28()), "\n")
	print("r29     ", hex(c.r29()), "\n")
	print("lr      ", hex(c.lr()), "\n")
	print("sp      ", hex(c.sp()), "\n")
	print("pc      ", hex(c.pc()), "\n")

	// R20: ptr to source memory
	// R21: ptr to destination memory
	// R26, R27 (aka REGTMP): scratch space
	// R20 and R21 are updated as a side effect
	fmt.Fprintln(w, "TEXT runtime·duffcopy<ABIInternal>(SB), NOSPLIT|NOFRAME, $0-0")

	for i := 0; i < 64; i++ {
		fmt.Fprintln(w, "\tLDP.P\t16(R20), (R26, R27)")
		fmt.Fprintln(w, "\tSTP.P\t(R26, R27), 16(R21)")
		fmt.Fprintln(w)
	}
	fmt.Fprintln(w, "\tRET")
}

	MOVD	R21, (offset+8*7)(R1)  \
	MOVD	R22, (offset+8*8)(R1)  \
	MOVD	R23, (offset+8*9)(R1)  \
	MOVD	R24, (offset+8*10)(R1) \
	MOVD	R25, (offset+8*11)(R1) \
	MOVD	R26, (offset+8*12)(R1) \
	MOVD	R27, (offset+8*13)(R1) \
	MOVD	R28, (offset+8*14)(R1) \
	MOVD	R29, (offset+8*15)(R1) \
	MOVD	g,   (offset+8*16)(R1) \
	MOVD	R31, (offset+8*17)(R1)

#define RESTORE_GPR(offset)            \
	MOVD	(offset+8*0)(R1), R14  \

#define TEB_TlsSlots 0x1480
#define TEB_ArbitraryPtr 0x28

// Note: R0-R7 are args, R8 is indirect return value address,
// R9-R15 are caller-save, R19-R29 are callee-save.
//
// load_g and save_g (in tls_arm64.s) clobber R27 (REGTMP) and R0.

TEXT runtime·asmstdcall_trampoline<ABIInternal>(SB),NOSPLIT,$0
	B	runtime·asmstdcall(SB)

// void runtime·asmstdcall(void *c);
TEXT runtime·asmstdcall(SB),NOSPLIT,$16

 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */

package org.gradle.plugins.ide.tooling.r27

import org.gradle.integtests.tooling.fixture.TargetGradleVersion
import org.gradle.integtests.tooling.fixture.ToolingApiSpecification
import org.gradle.tooling.model.eclipse.EclipseProject

func (c *sigctxt) r24() uint64 { return c.regs().sc_regs[24] }
func (c *sigctxt) r25() uint64 { return c.regs().sc_regs[25] }
func (c *sigctxt) r26() uint64 { return c.regs().sc_regs[26] }
func (c *sigctxt) r27() uint64 { return c.regs().sc_regs[27] }
func (c *sigctxt) r28() uint64 { return c.regs().sc_regs[28] }
func (c *sigctxt) r29() uint64 { return c.regs().sc_regs[29] }
func (c *sigctxt) r30() uint64 { return c.regs().sc_regs[30] }