Len      int      // length of encoded instruction in bytes
	PCRel    int      // length of PC-relative address in instruction encoding
	PCRelOff int      // index of start of PC-relative address in instruction encoding
}

// Prefixes is an array of prefixes associated with a single instruction.
// The prefixes are listed in the same order as found in the instruction:

	return cpu.ARM64.HasCRC32
}

func archInitCastagnoli() {
	if !cpu.ARM64.HasCRC32 {
		panic("arch-specific crc32 instruction for Castagnoli not available")
	}
}

func archUpdateCastagnoli(crc uint32, p []byte) uint32 {
	if !cpu.ARM64.HasCRC32 {
		panic("arch-specific crc32 instruction for Castagnoli not available")
	}

	return ^castagnoliUpdate(^crc, p)
}

func archAvailableIEEE() bool {

//
// Permission is hereby granted, free of charge, to any person obtaining a copy
// of this software and associated documentation files (the "Software"), to deal
// in the Software without restriction, including without limitation the rights
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
// copies of the Software, and to permit persons to whom the Software is

// An Args holds the instruction arguments.
// If an instruction has fewer than 4 arguments,
// the final elements in the array are nil.
type Args [4]Arg

// An Arg is a single instruction argument, one of these types:
// Endian, Imm, Mem, PCRel, Reg, RegList, RegShift, RegShiftReg.
type Arg interface {
	IsArg()
	String() string
}

type Float32Imm float32

func (Float32Imm) IsArg() {}

func (f Float32Imm) String() string {

{"Name":"ASR (immediate)","Bits":"1|0|0|1|0|0|1|1|0|1|immr:6|111111:6|Rn:5|Rd:5","Arch":"64-bit variant","Syntax":"ASR <Xd>, <Xn>, #<shift>","Code":"","Alias":"This instruction is an alias of the SBFM instruction."},

        }

        VersionRange range = artifact.getVersionRange();
        if (range != null) {
            for (Restriction restriction : range.getRestrictions()) {
                if (isSnapshot(restriction.getLowerBound()) || isSnapshot(restriction.getUpperBound())) {
                    return RELEASE_OR_SNAPSHOT;
                }
            }
        }

        return RELEASE;
    }

//go:build gc

#include "textflag.h"

// try to run "vmov.f64 d0, d0" instruction
TEXT ·useVFPv1(SB),NOSPLIT,$0
	WORD $0xeeb00b40	// vmov.f64 d0, d0
	RET

// try to run VFPv3-only "vmov.f64 d0, #112" instruction
TEXT ·useVFPv3(SB),NOSPLIT,$0
	WORD $0xeeb70b00	// vmov.f64 d0, #112
	RET

// try to run ARMv6K (or above) "ldrexd" instruction
TEXT ·useARMv6K(SB),NOSPLIT,$32
	MOVW R13, R2
	BIC  $15, R13

//
// Permission is hereby granted, free of charge, to any person obtaining a copy
// of this software and associated documentation files (the "Software"), to deal
// in the Software without restriction, including without limitation the rights
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
// copies of the Software, and to permit persons to whom the Software is

 */
@Incubating
public enum Architecture {
    /**
     * 32-bit complex instruction set computer (CISC) architectures, including "x32", "i386", "x86"..
     */
    X86,

    /**
     * 64-bit variant of the X86 instruction set, including "x64", "x86_64", "amd64", "ia64".
     */
    X86_64,

    /**
     * 64-bit reduced instruction set computer (RISC) architectures, including "aarch64", "arm64".
     */
    AARCH64

// External code calls into callbackasm at an offset corresponding
// to the callback index. Callbackasm is a table of MOV and B instructions.
// The MOV instruction loads R12 with the callback index, and the
// B instruction branches to callbackasm1.
// callbackasm1 takes the callback index from R12 and
// indexes into an array that stores information about each callback.