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subprojects/diagnostics/src/integTest/groovy/org/gradle/api/tasks/diagnostics/OutgoingVariantsReportTaskIntegrationTest.groovy
canBeResolved = false assert canBeConsumed } task redJar(type: Jar) { archiveClassifier = 'red' from(sourceSets.main.output) } artifacts { custom redJar } """.stripIndent() and: file("src/main/java/Hello.java") << """
Registered: Wed Jun 12 18:38:38 UTC 2024 - Last Modified: Wed Mar 13 19:52:38 UTC 2024 - 50K bytes - Viewed (0) -
src/cmd/internal/obj/x86/asm6.go
case REG_TASK: return Ytask case REG_CR + 0: return Ycr0 case REG_CR + 1: return Ycr1 case REG_CR + 2: return Ycr2 case REG_CR + 3: return Ycr3 case REG_CR + 4: return Ycr4 case REG_CR + 5: return Ycr5 case REG_CR + 6: return Ycr6 case REG_CR + 7: return Ycr7 case REG_CR + 8: return Ycr8 case REG_DR + 0:
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 15 15:44:14 UTC 2024 - 146.9K bytes - Viewed (0) -
src/cmd/internal/obj/ppc64/asm_test.go
{obj.Addr{Type: obj.TYPE_REG, Reg: REG_V2}, C_VREG}, {obj.Addr{Type: obj.TYPE_REG, Reg: REG_VS1}, C_VSREG}, {obj.Addr{Type: obj.TYPE_REG, Reg: REG_VS2}, C_VSREGP}, {obj.Addr{Type: obj.TYPE_REG, Reg: REG_CR}, C_CREG}, {obj.Addr{Type: obj.TYPE_REG, Reg: REG_CR1}, C_CREG}, {obj.Addr{Type: obj.TYPE_REG, Reg: REG_CR1SO}, C_CRBIT}, {obj.Addr{Type: obj.TYPE_REG, Reg: REG_SPR0}, C_SPR},
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Feb 09 22:14:57 UTC 2024 - 17.3K bytes - Viewed (0) -
tensorflow/c/kernels_experimental.cc
#include "tensorflow/c/tf_status_helper.h" #include "tensorflow/c/tf_status_internal.h" #include "tensorflow/c/tf_tensor_internal.h" #include "tensorflow/core/framework/control_flow.h" #include "tensorflow/core/framework/ref_var.h" #include "tensorflow/core/framework/resource_mgr.h" #include "tensorflow/core/framework/resource_var.h" #include "tensorflow/core/framework/types.h" #include "tensorflow/core/framework/variant.h"
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Apr 23 06:12:29 UTC 2024 - 30.9K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/canonicalize.mlir
// CHECK: "tf.XlaVariadicReduceV2"(%arg0, %arg1) <{dimensions_to_reduce = [], operandSegmentSizes = array<i32: 1, 1>, reducer = @sum1}> {device = "/job:localhost/replica:0/task:0/device:GPU:0"} : (tensor<*xbf16>, tensor<*xbf16>) -> tensor<*xbf16> %0 = "tf.XlaReduce"(%arg0, %arg1) {dimensions_to_reduce = [], reducer = @sum1, device = "/job:localhost/replica:0/task:0/device:GPU:0"} : (tensor<*xbf16>, tensor<*xbf16>) -> tensor<*xbf16>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 09 22:07:10 UTC 2024 - 132.1K bytes - Viewed (0) -
src/cmd/internal/obj/ppc64/asm9.go
if p.From.Reg == REG_CR || p.To.Reg == REG_CR { c.ctxt.Diag("CR argument must be a conditional register field (CR0-CR7)\n%v", p) } o1 = AOP_RRR(OP_MCRF, ((uint32(p.To.Reg) & 7) << 2), ((uint32(p.From.Reg) & 7) << 2), 0) case 68: /* mfcr rD; mfocrf CRM,rD */ o1 = AOP_RRR(OP_MFCR, uint32(p.To.Reg), 0, 0) /* form, whole register */ if p.From.Reg != REG_CR {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 15 13:55:28 UTC 2024 - 156.1K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/stablehlo/tests/legalize_hlo.mlir
// -2147483648 is MIN for INT32 %0 = mhlo.constant dense<-2147483648> : tensor<i32> %1 = mhlo.reduce(%arg0 init: %0) across dimensions = [1] : (tensor<1x4xi32>, tensor<i32>) -> tensor<1xi32> reducer(%arg2: tensor<i32>, %arg3: tensor<i32>) { %892 = mhlo.maximum %arg2, %arg3 : tensor<i32> "mhlo.return"(%892) : (tensor<i32>) -> () } func.return %1 : tensor<1xi32> }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed May 29 07:26:59 UTC 2024 - 340.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/tf2xla/transforms/legalize_tf.cc
block->addArguments({type, type}, SmallVector<Location, 2>(2, loc)); auto reducer = rewriter.create<CompareOp>(loc, block->getArgument(0), block->getArgument(1), ComparisonDirection::GE); rewriter.create<ReturnOp>(loc, reducer.getResult()); } rewriter.replaceOp(op, result); return success();
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Jun 11 20:00:43 UTC 2024 - 291.8K bytes - Viewed (1) -
tensorflow/compiler/mlir/tensorflow/ir/tf_ops_n_z.cc
auto function = dyn_cast_or_null<mlir::func::FuncOp>( SymbolTable::lookupSymbolIn(module, op.getReducer())); if (!function) return op.emitOpError() << "No reducer"; if (!function.getBody().hasOneBlock()) return op.emitOpError() << "reducer has more than one block"; return success(); } //===----------------------------------------------------------------------===// // XlaVariadicSortOp
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 09 22:07:10 UTC 2024 - 170.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/tf2xla/tests/legalize-tf.mlir
// CHECK: return %[[REDUCE]] %0 = "tf.XlaVariadicReduceV2"(%arg0, %arg1) {_XlaHasReferenceVars = false, device = "/job:localhost/replica:0/task:0/device:XLA_GPU:0", dimensions_to_reduce = [0], operandSegmentSizes = array<i32: 1, 1>, reducer = @sum_reducer} : (tensor<2x3xcomplex<f64>>, tensor<complex<f64>>) -> tensor<3xcomplex<f64>> func.return %0 : tensor<3xcomplex<f64>> }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon May 06 18:46:23 UTC 2024 - 335.5K bytes - Viewed (0)