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Results 1 - 10 of 82 for 1x4xi32 (0.53 sec)
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tensorflow/compiler/mlir/tf2xla/tests/legalize-tf-prefer-tf2xla.mlir
// NOFALLBACK-LABEL: @xla_svd func.func @xla_svd(%arg0: tensor<1x1xf32>) -> (tensor<1xf32>, tensor<1x1xf32>, tensor<1x1xf32>) { // NOFALLBACK: XlaSvd %s, %u, %v = "tf.XlaSvd"(%arg0) {max_iter = 1, epsilon = 1.0E-09 : f32, precision_config = ""} : (tensor<1x1xf32>) -> (tensor<1xf32>, tensor<1x1xf32>, tensor<1x1xf32>) func.return %s, %u, %v : tensor<1xf32>, tensor<1x1xf32>, tensor<1x1xf32> }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Sat Apr 06 15:32:52 UTC 2024 - 15.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/xla_broadcast.mlir
// CHECK-NEXT: %[[GROUP:.*]] = "tf.Const"() // CHECK-SAME: [0, 1, 2, 3] // CHECK-NEXT: %[[REDUCED:.*]] = "tf.XlaAllReduce"(%[[ID]], %[[GROUP]]) <{mode = "CrossReplica", reduce_op = "Add"}> : (tensor<f32>, tensor<1x4xi32>) -> tensor<f32> // CHECK-NEXT: "tf.OpA"(%[[REDUCED]]) : (tensor<f32>) -> () tf_device.replicate {n = 4 : i32} { "tf_device.cluster"() ({ "tf.OpA"(%arg0) : (tensor<f32>) -> () tf_device.return
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Jun 13 18:52:07 UTC 2024 - 2.9K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/legalize-tf.mlir
} func.func @addN(%arg0: tensor<2x3xi32>, %arg1: tensor<2x3xi32>, %arg2: tensor<2x3xi32>) -> tensor<2x3xi32> { %0 = "tf.AddN"(%arg0, %arg1, %arg2) : (tensor<2x3xi32>, tensor<2x3xi32>, tensor<2x3xi32>) -> tensor<2x3xi32> func.return %0 : tensor<2x3xi32> // CHECK-LABEL: addN // CHECK: "tfl.add_n"(%arg0, %arg1, %arg2) : (tensor<2x3xi32>, tensor<2x3xi32>, tensor<2x3xi32>) -> tensor<2x3xi32> // CHECK: return }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Jun 05 01:54:33 UTC 2024 - 153.4K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/ops.mlir
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Jun 06 19:09:08 UTC 2024 - 189.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/stablehlo/tests/legalize_hlo.mlir
// CHECK: %[[VAL_3:.*]] = "tf.LeftShift"(%[[VAL_1]], %[[VAL_0]]) : (tensor<4xi32>, tensor<1xi32>) -> tensor<4xi32> // CHECK: return %[[VAL_2]], %[[VAL_3]] : tensor<4xi32>, tensor<4xi32> // CHECK: } func.func @broadcast_shift_left(%arg0: tensor<1xi32>, %arg1: tensor<4xi32>) -> (tensor<4xi32>, tensor<4xi32>) {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed May 29 07:26:59 UTC 2024 - 340.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/tf2xla/tests/legalize-tf.mlir
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon May 06 18:46:23 UTC 2024 - 335.5K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/stablehlo/tests/compose-uniform-quantized-type.mlir
%8 = stablehlo.convert %7 : (tensor<1x2xi32>) -> tensor<1x2xf32> %9 = stablehlo.convert %2 : (tensor<2x3xi8>) -> tensor<2x3xf32> %10 = stablehlo.dot_general %8, %9, contracting_dims = [1] x [0] : (tensor<1x2xf32>, tensor<2x3xf32>) -> tensor<1x3xf32> %11 = stablehlo.convert %3 : (tensor<1x3xi32>) -> tensor<1x3xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue May 14 17:10:32 UTC 2024 - 37K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/tf-ops.mlir
func.func @testPackedTPUPartitionedInputV2(tensor<2x4xf32>, tensor<2x4xf32>) -> tensor<4x4xf32> { ^bb0(%arg0: tensor<2x4xf32>, %arg1: tensor<2x4xf32>): // expected-error @+1 {{expected 1 inputs, got 2}} %0 = "tf.TPUPartitionedInputV2"(%arg0, %arg1) {partition_dims = [2, 1], is_packed = true} : (tensor<2x4xf32>, tensor<2x4xf32>) -> tensor<4x4xf32> func.return %0 : tensor<4x4xf32> } // -----
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 23 14:40:35 UTC 2023 - 236.4K bytes - Viewed (0) -
tensorflow/compiler/mlir/tfrt/tests/saved_model/testdata/test.mlir
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri Mar 25 11:03:04 UTC 2022 - 1.6K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/tensorflow/tests/insert_custom_aggregation_ops.mlir
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri May 10 04:07:09 UTC 2024 - 32.1K bytes - Viewed (0)