'input_': input_,
        'filter_': filter_,
        'bias': bias,
        'stride_w': 2,
        'stride_h': 2,
        'dilation_w': 1,
        'dilation_h': 1,
        'padding': 'SAME',
        'act': 'RELU'
    }

    self._assertOpAndComposite([input_, filter_, bias],
                               tf.function(gen_mnist_ops.new_conv2d),
                               ops_defs._composite_conv_add_relu, kwargs)

    attrs=['act: {"", "RELU", "RELU6", "TANH"} = ""'],
    derived_attrs=['T: {float, int8}'],
    outputs=['o: T'])
def _composite_fully_connected(input_, filter_, bias, act):
  res = tf.raw_ops.MatMul(
      a=input_, b=filter_, transpose_a=False, transpose_b=True)
  res = tf.raw_ops.Add(x=res, y=bias)
  if act == 'RELU':
    return tf.raw_ops.Relu(features=res)
  elif act == 'RELU6':

 Conv2D 53
 Conv2DBackpropFilter 53
 Conv2DBackpropInput 52
 Equal 1
 FusedBatchNormGradV2 53
 FusedBatchNormV2 53
 MatMul 3
 MaxPool 1
 MaxPoolGrad 1
 Mean 1
 Mul 218
 Pad 2
 ReadVariableOp 538
 Relu 49
 ReluGrad 49
 Reshape 2
 ResourceApplyKerasMomentum 161
 Slice 1
 Softmax 1
 SparseSoftmaxCrossEntropyWithLogits 1
 Squeeze 1
 Sum 1
 Tile 1
 Transpose 1
cluster 1 size 815
 AddN 1

  // CHECK: tfrt_fallback_async.executeop key(0) cost(100) device("cpu") "tf.Relu"(%{{.*}}) {T = f32} : 1
  %2 = tfrt_fallback_async.executeop key(0) cost(100) device("cpu") "tf.Relu"(%1) {T = f32} : 1
  // CHECK: tfrt_fallback_async.fallback_tensor_to_corert_tensorhandle

// CHECK-NEXT:      outputs: [ 5, 6, 7, 8 ],
// CHECK-NEXT:      builtin_options_type: LSTMOptions,
// CHECK-NEXT:      builtin_options: {
// CHECK-NEXT:        fused_activation_function: RELU,
// CHECK-NEXT:        cell_clip: 1.0,
// CHECK-NEXT:        proj_clip: 2.0,
// CHECK-NEXT:        kernel_type: BASIC
// CHECK-NEXT:      },
// CHECK-NEXT:      intermediates: [ ]
// CHECK-NEXT:    } ],

// Canonicalize tf.Maximum of zero to tf.Relu
//===----------------------------------------------------------------------===//

def IsInteger32Pred: CPred<
  "getElementTypeOrSelf($0.getType()).isInteger(32)">;

// Whether the transformation is compatible with the device if given.
// Currently, Relu with int32 is not supported on GPU.
def IsDeviceCompatible: Constraint<

  // CHECK: %[[VAL_0:.*]] = "tf._FusedConv2D"(%arg2, %arg1, %arg0) <{data_format = "NHWC", dilations = [1, 1, 1, 1], epsilon = 0.000000e+00 : f32, explicit_paddings = [], fused_ops = ["BiasAdd", "Relu"], num_args = 1 : i64, operandSegmentSizes = array<i32: 1, 1, 1, 0>, padding = "SAME", strides = [1, 1, 1, 1], use_cudnn_on_gpu = true}> {TArgs = [f32]} : (tensor<8x32x32x3xf32>, tensor<1x1x3x128xf32>, tensor<128xf32>) -> tensor<*xf32>

    .SetIsAggregate();

REGISTER_OP("MyBiasedDense")
    .Input("input: T")
    .Input("weight: T")
    .Input("bias: T")
    .Output("out: T")
    .Attr("T: {float, int8}")
    .Attr("act: {'', 'relu', 'relu6'} = ''");

     (TFR_ConstantTensorOp (Arith_ConstantOp ConstantAttr<I32Attr, "127">))]>;

def QuantActRangeReluPattern :
  Pattern<
    (TFR_TFRQuantActRangeOp
     (TFR_ConstOp HasStringAttr<"RELU">:$act),
     (ConstantLikeMatcher F32Attr:$scale),
     (ConstantLikeMatcher I64Attr:$zp)),
    [(TFR_ConstantTensorOp (Arith_ConstantOp (Quantize<"0.0f"> $scale, $zp))),

      {"quantized_ops": ["${main_op}", "Relu"], "act_func": "internal_requantize_and_relu_fn", "output_type": "i8"},
      {"quantized_ops": ["${main_op}", "Relu6"], "act_func": "internal_requantize_and_relu6_fn", "output_type": "i8"},
      {"quantized_ops": ["${main_op}"], "act_func": "internal_dequantize_no_activation_fn", "output_type": "f32"},