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tensorflow/compiler/mlir/quantization/tensorflow/tests/replace_cast_hacks_with_tf_xla_ops.mlir
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 81K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/layout_optimization_layout_assignment_to_nchw.mlir
padding = "EXPLICIT", strides = [5, 6, 7, 8] } : (tensor<1x32x32x3xf32>, tensor<4xi32>, tensor<1x32x32x8xf32>) -> tensor<1x1x3x8xf32> func.return %0 : tensor<1x1x3x8xf32> } // CHECK-LABEL: func @transposeConv2DBackpropInput func.func @transposeConv2DBackpropInput( %input_sizes: tensor<4xi32>, %filter: tensor<1x1x3x8xf32>, %out_backprop: tensor<1x32x32x8xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 9K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/optimize_batch_matmul.mlir
// CHECK: %[[RES1:.*]] = "tfl.batch_matmul"(%[[RES0]], %arg2) <{adj_x = false, adj_y = false, asymmetric_quantize_inputs = false}> : (tensor<8x4xf32>, tensor<4x256xf32>) -> tensor<8x256xf32> %2 = "tfl.batch_matmul"(%1, %arg2) {adj_x = true, adj_y = false, asymmetric_quantize_inputs = false} : (tensor<4x8xf32>, tensor<4x256xf32>) -> tensor<8x256xf32> func.return %2 : tensor<8x256xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 02 09:41:17 UTC 2024 - 9K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/graphdef2mlir/feed-as-fetch.pbtxt
attr { key: "dtype" value { type: DT_INT32 } } } versions { producer: 27 } # CHECK-LABEL: func @main # CHECK-SAME: (%[[ARG_0:[a-z0-9]+]]: tensor<8xi32>) -> tensor<8xi32> # CHECK-SAME: control_outputs = "" # CHECK-SAME: inputs = "input" # CHECK-SAME: outputs = "input" # CHECK: %[[GRAPH:[0-9]+]] = tf_executor.graph # CHECK: tf_executor.fetch %[[ARG_0]]
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Jun 10 19:53:21 UTC 2020 - 684 bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/quantization/tensorflow/tests/fallback_to_flex_ops_default.mlir
} // CHECK-LABEL: conv2d_backprop_input_with_add func.func @conv2d_backprop_input_with_add(%arg0: tensor<4xi32>, %arg1: tensor<3x3x1x32xf32>, %arg2: tensor<15x14x14x32xf32>) -> tensor<15x28x28x1xf32> { %0 = "tf.Conv2DBackpropInput"(%arg0, %arg1, %arg2) {strides = [1, 2, 2, 1], padding="SAME", dilations=[1, 1, 1, 1]}: (tensor<4xi32>, tensor<3x3x1x32xf32>, tensor<15x14x14x32xf32>) -> tensor<15x28x28x1xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 02 09:41:17 UTC 2024 - 13.4K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/graphdef2mlir/arg-as-fetch.pbtxt
} } attr { key: "index" value { i: 0 } } } versions { producer: 27 } # CHECK-LABEL: func @main # CHECK-SAME: (%[[ARG_0:[a-z0-9]+]]: tensor<8xi32> loc({{.*}})) -> tensor<8xi32> # CHECK-SAME: control_outputs = "" # CHECK-SAME: inputs = "arg" # CHECK-SAME: outputs = "arg" # CHECK: %[[GRAPH:[0-9]+]] = tf_executor.graph # CHECK: tf_executor.fetch %[[ARG_0]]
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue May 25 01:00:57 UTC 2021 - 775 bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/mlprogram.mlir
// CHECK-LABEL @lowers_string_ops // CHECK-DAG: ml_program.global public @vars.Variable_1([]) : tensor<!tf_type.string> func.func @lowers_string_ops(%arg0: tensor<128xi32>, %arg1: tensor<128xi32>, %arg2: tensor<128x1xi32>, %arg3: tensor<128x90xi32>, %arg4: tensor<128x90xi32>, %arg5: tensor<128x90xi32>, %arg6: tensor<128x90x64xf32>, %arg7: tensor<128x90x64xf32>) -> tensor<!tf_type.string> {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Feb 22 19:27:16 UTC 2024 - 7.4K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/layout_optimization_layout_assignment_gpu_cc_60.mlir
padding = "VALID", strides = [1, 1, 1, 1] } : (tensor<1x28x28x64xf16>, tensor<4xi32>, tensor<1x28x28x64xf16>) -> tensor<1x1x64x64xf16> func.return %0 : tensor<1x1x64x64xf16> } // CHECK-LABEL: func @transposeConv2DBackpropInput_f16 func.func @transposeConv2DBackpropInput_f16( %input_size: tensor<4xi32>, %filter: tensor<1x28x28x64xf16>, %out_backprop: tensor<1x28x28x64xf16>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Jun 21 08:41:18 UTC 2022 - 5.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/tf2xla/api/v2/testdata/outside_compilation.mlir
%outputs_23, %control_24 = tf_executor.island(%control_18) wraps "tf.Const"() {_tpu_replicate = "cluster_sample_sequence", device = "", value = dense<[3, 32, 32, 1]> : tensor<4xi32>} : () -> tensor<4xi32> %outputs_25, %control_26 = tf_executor.island(%control_18) wraps "tf.TPUCompilationResult"() {_tpu_compilation_status = "cluster_sample_sequence", device = ""} : () -> tensor<!tf_type.string>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Oct 19 20:19:45 UTC 2023 - 21.9K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/analyze-variables.mlir
%0 = "tf.VarHandleOp"() {container = "c", shared_name = "v"} : () -> tensor<*x!tf_type.resource<tensor<*xi32>>> %cst = arith.constant dense<2> : tensor<4xi32> "tf.AssignAddVariableOp"(%0, %cst) {} : (tensor<*x!tf_type.resource<tensor<*xi32>>>, tensor<4xi32>) -> () %1 = "tf.ReadVariableOp"(%0) {dtype = i32} : (tensor<*x!tf_type.resource<tensor<*xi32>>>) -> tensor<*xi32> func.return %1 : tensor<*xi32> } }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon May 09 11:49:28 UTC 2022 - 5.6K bytes - Viewed (0)