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fastapi/applications.py
Created: Sun Dec 28 07:19:09 GMT 2025 - Last Modified: Wed Dec 17 21:25:59 GMT 2025 - 176.3K bytes - Click Count (0) -
lib/fips140/v1.1.0-rc1.zip
, r1<<13) return uint16(r1), r0 } // highBits implements HighBits from FIPS 204. func highBits(r ringElement, p parameters) [n]byte { var w [n]byte switch p.γ2 { case 32: for i := range n { w[i] = highBits32(fieldFromMontgomery(r[i])) } case 88: for i := range n { w[i] = highBits88(fieldFromMontgomery(r[i])) } default: panic("mldsa: internal error: unsupported γ2") } return w } // useHint implements UseHint from FIPS 204. // // It is not constant-time. func useHint(r ringElement, h [n]byte, p parameters)...
Created: Tue Dec 30 11:13:12 GMT 2025 - Last Modified: Thu Dec 11 16:27:41 GMT 2025 - 663K bytes - Click Count (0) -
RELEASE.md
[CVE-2020-14155](https://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2020-14155). * Updates `sqlite3` to `3.44.0` to keep in sync with master branch. * Newer ROCm versions are supported on the 2.1 branch. # Release 2.0.4 Note that this is the last patch release for the TensorFlow 2.0.x series. ## Bug Fixes and Other Changes * Fixes an access to unitialized memory in Eigen code
Created: Tue Dec 30 12:39:10 GMT 2025 - Last Modified: Tue Oct 28 22:27:41 GMT 2025 - 740.4K bytes - Click Count (3) -
api/go1.16.txt
pkg syscall (darwin-arm64), const SYS_MSYNC ideal-int pkg syscall (darwin-arm64), const SYS_MSYNC_NOCANCEL = 405 pkg syscall (darwin-arm64), const SYS_MSYNC_NOCANCEL ideal-int pkg syscall (darwin-arm64), const SYS_MUNLOCK = 204 pkg syscall (darwin-arm64), const SYS_MUNLOCK ideal-int pkg syscall (darwin-arm64), const SYS_MUNLOCKALL = 325 pkg syscall (darwin-arm64), const SYS_MUNLOCKALL ideal-int pkg syscall (darwin-arm64), const SYS_MUNMAP = 73
Created: Tue Dec 30 11:13:12 GMT 2025 - Last Modified: Fri Dec 02 16:30:41 GMT 2022 - 479.2K bytes - Click Count (0) -
lib/fips140/v1.0.0-c2097c7c.zip
ADDL $0x01, R10 MOVL R10, R11 XORL R12, R11 BSWAPL R11 MOVL R11, 172(SP) MOVOU X11, 176(SP) ADDL $0x01, R10 MOVL R10, R11 XORL R12, R11 BSWAPL R11 MOVL R11, 188(SP) MOVOU X11, 192(SP) ADDL $0x01, R10 MOVL R10, R11 XORL R12, R11 BSWAPL R11 MOVL R11, 204(SP) MOVOU X11, 208(SP) ADDL $0x01, R10 MOVL R10, R11 XORL R12, R11 BSWAPL R11 MOVL R11, 220(SP) MOVOU X11, 224(SP) ADDL $0x01, R10 MOVL R10, R11 XORL R12, R11 BSWAPL R11 MOVL R11, 236(SP) MOVOU X11, 240(SP) ADDL $0x01, R10 MOVL R10, R11 XORL R12, R11...
Created: Tue Dec 30 11:13:12 GMT 2025 - Last Modified: Thu Sep 25 19:53:19 GMT 2025 - 642.7K bytes - Click Count (0)