- Sort Score
- Result 10 results
- Languages All
Results 31 - 40 of 257 for mem0 (0.18 sec)
-
docs/fr/docs/history-design-future.md
</blockquote> ## Recherche En utilisant toutes les alternatives précédentes, j'ai eu la chance d'apprendre de toutes, de prendre des idées, et de les combiner de la meilleure façon que j'ai pu trouver pour moi-même et les équipes de développeurs avec lesquelles j'ai travaillé.
Registered: Mon Jun 17 08:32:26 UTC 2024 - Last Modified: Fri Mar 22 01:42:11 UTC 2024 - 4.9K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteMIPS64.go
v.AddArg2(ptr, mem) return true } // match: (Load <t> ptr mem) // cond: (is16BitInt(t) && t.IsSigned()) // result: (MOVHload ptr mem) for { t := v.Type ptr := v_0 mem := v_1 if !(is16BitInt(t) && t.IsSigned()) { break } v.reset(OpMIPS64MOVHload) v.AddArg2(ptr, mem) return true } // match: (Load <t> ptr mem)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Jul 31 03:59:48 UTC 2023 - 211.6K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteRISCV64.go
b := v.Block config := b.Func.Config typ := &b.Func.Config.Types // match: (Move [0] _ _ mem) // result: mem for { if auxIntToInt64(v.AuxInt) != 0 { break } mem := v_2 v.copyOf(mem) return true } // match: (Move [1] dst src mem) // result: (MOVBstore dst (MOVBload src mem) mem) for { if auxIntToInt64(v.AuxInt) != 1 { break } dst := v_0
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Mar 07 14:57:07 UTC 2024 - 205.1K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/AMD64Ops.go
{name: "SETLEstore", argLength: 3, reg: gpstoreconst, asm: "SETLE", aux: "SymOff", typ: "Mem", faultOnNilArg0: true, symEffect: "Write"}, // extract signed <= condition from arg1 to arg0+auxint+aux, arg2=mem
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Aug 04 16:40:24 UTC 2023 - 98K bytes - Viewed (1) -
src/cmd/vendor/golang.org/x/arch/arm/armasm/plan9x.go
// Check for RET reg, _ := inst.Args[0].(Reg) mem, _ := inst.Args[1].(Mem) if inst.Op&^15 == LDR_EQ && reg == R15 && mem.Base == SP && mem.Sign == 0 && mem.Mode == AddrPostIndex { return fmt.Sprintf("RET%s #%d", op[3:], mem.Offset) } // Check for PC-relative load. if mem.Base == PC && mem.Sign == 0 && mem.Mode == AddrOffset && text != nil { addr := uint32(pc) + 8 + uint32(mem.Offset) buf := make([]byte, 8)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 19 23:33:33 UTC 2023 - 11.9K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/S390XOps.go
{name: "MOVBstore", argLength: 3, reg: gpstore, asm: "MOVB", aux: "SymOff", typ: "Mem", faultOnNilArg0: true, symEffect: "Write"}, // store byte in arg1 to arg0+auxint+aux. arg2=mem {name: "MOVHstore", argLength: 3, reg: gpstore, asm: "MOVH", aux: "SymOff", typ: "Mem", faultOnNilArg0: true, symEffect: "Write"}, // store 2 bytes in arg1 to arg0+auxint+aux. arg2=mem
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Feb 24 00:21:13 UTC 2023 - 52.5K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteARM.go
// result: (MOVBstore [c] ptr val mem) for { ptr := v_0 if v_1.Op != OpARMMOVWconst { break } c := auxIntToInt32(v_1.AuxInt) val := v_2 mem := v_3 v.reset(OpARMMOVBstore) v.AuxInt = int32ToAuxInt(c) v.AddArg3(ptr, val, mem) return true } // match: (MOVBstoreidx (MOVWconst [c]) ptr val mem) // result: (MOVBstore [c] ptr val mem) for {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Nov 20 17:19:36 UTC 2023 - 486.8K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/MIPS64.rules
mem) // moves (Move [0] _ _ mem) => mem (Move [1] dst src mem) => (MOVBstore dst (MOVBload src mem) mem) (Move [2] {t} dst src mem) && t.Alignment()%2 == 0 => (MOVHstore dst (MOVHload src mem) mem) (Move [2] dst src mem) => (MOVBstore [1] dst (MOVBload [1] src mem) (MOVBstore dst (MOVBload src mem) mem)) (Move [4] {t} dst src mem) && t.Alignment()%4 == 0 =>
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Jul 31 03:59:48 UTC 2023 - 41.9K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/MIPS.rules
mem) // moves (Move [0] _ _ mem) => mem (Move [1] dst src mem) => (MOVBstore dst (MOVBUload src mem) mem) (Move [2] {t} dst src mem) && t.Alignment()%2 == 0 => (MOVHstore dst (MOVHUload src mem) mem) (Move [2] dst src mem) => (MOVBstore [1] dst (MOVBUload [1] src mem) (MOVBstore dst (MOVBUload src mem) mem)) (Move [4] {t} dst src mem) && t.Alignment()%4 == 0 =>
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 24 14:43:03 UTC 2023 - 35.3K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteAMD64splitload.go
x.Aux = symToAux(sym) x.AddArg2(ptr, mem) v.AddArg2(x, x) return true } // match: (CMPBconstload {sym} [vo] ptr mem) // cond: vo.Val() != 0 // result: (CMPBconst (MOVBload {sym} [vo.Off()] ptr mem) [vo.Val8()]) for { vo := auxIntToValAndOff(v.AuxInt) sym := auxToSym(v.Aux) ptr := v_0 mem := v_1 if !(vo.Val() != 0) { break } v.reset(OpAMD64CMPBconst)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Jan 19 22:42:34 UTC 2023 - 21.4K bytes - Viewed (0)