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Results 31 - 40 of 803 for destruction (0.16 sec)
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src/cmd/link/internal/arm/l.go
// // Permission is hereby granted, free of charge, to any person obtaining a copy // of this software and associated documentation files (the "Software"), to deal // in the Software without restriction, including without limitation the rights // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell // copies of the Software, and to permit persons to whom the Software is
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Jun 04 07:25:06 UTC 2020 - 3.6K bytes - Viewed (0) -
src/cmd/internal/obj/riscv/cpu.go
const ( // USES_REG_TMP indicates that a machine instruction generated from the // corresponding *obj.Prog uses the temporary register. USES_REG_TMP = 1 << iota // NEED_JAL_RELOC is set on JAL instructions to indicate that a // R_RISCV_JAL relocation is needed. NEED_JAL_RELOC // NEED_CALL_RELOC is set on an AUIPC instruction to indicate that it // is the first instruction in an AUIPC + JAL pair that needs a
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Mar 20 14:19:33 UTC 2024 - 13.1K bytes - Viewed (0) -
src/cmd/link/internal/x86/obj.go
// // Permission is hereby granted, free of charge, to any person obtaining a copy // of this software and associated documentation files (the "Software"), to deal // in the Software without restriction, including without limitation the rights // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell // copies of the Software, and to permit persons to whom the Software is
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Sep 13 19:32:19 UTC 2023 - 3.4K bytes - Viewed (0) -
src/runtime/memmove_plan9_amd64.s
// // Permission is hereby granted, free of charge, to any person obtaining a copy // of this software and associated documentation files (the "Software"), to deal // in the Software without restriction, including without limitation the rights // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell // copies of the Software, and to permit persons to whom the Software is
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Jun 04 07:25:06 UTC 2020 - 3K bytes - Viewed (0) -
src/cmd/link/internal/amd64/obj.go
// // Permission is hereby granted, free of charge, to any person obtaining a copy // of this software and associated documentation files (the "Software"), to deal // in the Software without restriction, including without limitation the rights // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell // copies of the Software, and to permit persons to whom the Software is
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Sep 13 19:32:19 UTC 2023 - 3.9K bytes - Viewed (0) -
src/runtime/memmove_plan9_386.s
// // Permission is hereby granted, free of charge, to any person obtaining a copy // of this software and associated documentation files (the "Software"), to deal // in the Software without restriction, including without limitation the rights // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell // copies of the Software, and to permit persons to whom the Software is
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Jun 04 07:25:06 UTC 2020 - 3.1K bytes - Viewed (0) -
maven-artifact/src/test/java/org/apache/maven/artifact/versioning/VersionRangeTest.java
List<Restriction> restrictions = range.getRestrictions(); assertEquals(1, restrictions.size(), CHECK_NUM_RESTRICTIONS); Restriction restriction = restrictions.get(0); assertNull(restriction.getLowerBound(), CHECK_LOWER_BOUND); assertFalse(restriction.isLowerBoundInclusive(), CHECK_LOWER_BOUND_INCLUSIVE); assertEquals("1.0", restriction.getUpperBound().toString(), CHECK_UPPER_BOUND);
Registered: Wed Jun 12 09:55:16 UTC 2024 - Last Modified: Wed Sep 06 08:39:32 UTC 2023 - 44.3K bytes - Viewed (0) -
src/cmd/internal/obj/riscv/obj.go
type encoding struct { encode func(*instruction) uint32 // encode returns the machine code for an instruction validate func(*obj.Link, *instruction) // validate validates an instruction length int // length of encoded instruction; 0 for pseudo-ops, 4 otherwise } var ( // Encodings have the following naming convention: // // 1. the instruction encoding (R/I/S/B/U/J), in lowercase
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Sun Apr 07 03:32:27 UTC 2024 - 77K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/amd64error.s
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Jun 14 00:03:57 UTC 2023 - 8.9K bytes - Viewed (0) -
src/cmd/link/internal/ppc64/asm.go
OP_ADDIS = 0x3c000000 // addis OP_LD = 0xe8000000 // ld OP_PLA_PFX = 0x06100000 // pla (prefix instruction word) OP_PLA_SFX = 0x38000000 // pla (suffix instruction word) OP_PLD_PFX_PCREL = 0x04100000 // pld (prefix instruction word, R=1) OP_PLD_SFX = 0xe4000000 // pld (suffix instruction word) OP_MFLR = 0x7c0802a6 // mflr OP_MTLR = 0x7c0803a6 // mtlr OP_MFCTR = 0x7c0902a6 // mfctr
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 19 20:54:08 UTC 2024 - 63.7K bytes - Viewed (0)