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Results 21 - 29 of 29 for lxvl (0.11 sec)

  1. src/internal/bytealg/indexbyte_ppc64x.s

    	BNE	CR6,foundat0		// Match found at R8+48 bytes, jump out
    
    	BR	notfound
    
    
    cmp8:	// Length 8 - 15
    #ifdef GOPPC64_power10
    	// Load all the bytes into a single VSR in BE order.
    	SLD	$56,R4,R5
    	LXVLL	R3,R5,V2
    	// Compare and count the number which don't match.
    	VCMPEQUB	V2,V1,V6
    	VCLZLSBB	V6,R3
    	// If count is the number of bytes, or more. No matches are found.
    	CMPU	R3,R4
    	MOVD	$-1,R5
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Apr 21 16:10:29 UTC 2023
    - 6.3K bytes
    - Viewed (0)
  2. src/cmd/asm/internal/asm/testdata/ppc64_p10.s

    	CNTTZDM R2, R3, R1                      // 7c411c76
    	DCFFIXQQ V1, F2                         // fc400fc4
    	DCTFIXQQ F2, V3                         // fc6117c4
    	LXVKQ $0, VS33                          // f03f02d1
    	LXVP 12352(R5), VS6                     // 18c53040
    	LXVPX (R1)(R2), VS4                     // 7c820a9a
    	LXVRBX (R1)(R2), VS4                    // 7c82081a
    	LXVRDX (R1)(R2), VS4                    // 7c8208da
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Mar 23 20:52:57 UTC 2023
    - 14.3K bytes
    - Viewed (0)
  3. src/cmd/internal/obj/ppc64/a.out.go

    	AVCIPHER
    	AVCIPHERLAST
    	AVNCIPH
    	AVNCIPHER
    	AVNCIPHERLAST
    	AVSBOX
    	AVSHASIGMA
    	AVSHASIGMAW
    	AVSHASIGMAD
    	AVMRGEW
    	AVMRGOW
    	AVCLZLSBB
    	AVCTZLSBB
    
    	/* VSX */
    	ALXV
    	ALXVL
    	ALXVLL
    	ALXVD2X
    	ALXVW4X
    	ALXVH8X
    	ALXVB16X
    	ALXVX
    	ALXVDSX
    	ASTXV
    	ASTXVL
    	ASTXVLL
    	ASTXVD2X
    	ASTXVW4X
    	ASTXVH8X
    	ASTXVB16X
    	ASTXVX
    	ALXSDX
    	ASTXSDX
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Apr 01 18:50:29 UTC 2024
    - 16K bytes
    - Viewed (0)
  4. src/cmd/internal/obj/ppc64/asm9_gtables.go

    	"SETBCR",
    	"SETBC",
    	"PEXTD",
    	"PDEPD",
    	"MTVSRWM",
    	"MTVSRQM",
    	"MTVSRHM",
    	"MTVSRDM",
    	"MTVSRBMI",
    	"MTVSRBM",
    	"LXVRWX",
    	"LXVRHX",
    	"LXVRDX",
    	"LXVRBX",
    	"LXVPX",
    	"LXVP",
    	"LXVKQ",
    	"DCTFIXQQ",
    	"DCFFIXQQ",
    	"CNTTZDM",
    	"CNTLZDM",
    	"CFUGED",
    	"BRW",
    	"BRH",
    	"BRD",
    	"HASHSTP",
    	"HASHST",
    	"HASHCHKP",
    	"HASHCHK",
    	"XXSPLTIW",
    	"XXSPLTIDP",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Nov 16 20:18:50 UTC 2022
    - 42.6K bytes
    - Viewed (0)
  5. src/crypto/aes/gcm_ppc64x.s

    	XXLOR	VS14, VS14, V23		// Save last key
    final_block_last:
    	VCIPHERLAST V15, V23, V15	// Finish encryption
    #ifdef GOPPC64_power10
    	// set up length
    	SLD	$56, IN_LEN, R17
    	LXVLL	BLK_INP, R17, V25
    	VXOR	V25, V15, V25
    	STXVLL	V25, BLK_OUT, R17
    #else
    	ADD	$32, R1, MASK_PTR
    	MOVD	$0, R16
    	P8_STXVB16X(V15, MASK_PTR, R0)
    	CMP	IN_LEN, $8
    	BLT	next4
    	MOVD	0(MASK_PTR), R14
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 27.1K bytes
    - Viewed (0)
  6. src/cmd/compile/internal/ppc64/ssa.go

    		// number of moves are generated based on the
    		// size.
    		// When moving >= 64 bytes a loop is used
    		//      MOVD len/32,REG_TMP
    		//      MOVD REG_TMP,CTR
    		// top:
    		//      LXV 0(R21),VS32
    		//      LXV 16(R21),VS33
    		//      ADD $32,R21
    		//      STXV VS32,0(R20)
    		//      STXV VS33,16(R20)
    		//      ADD $32,R20
    		//      BC 16,0,top
    		// Bytes not moved by this loop are moved
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 19:59:38 UTC 2024
    - 55.4K bytes
    - Viewed (0)
  7. src/cmd/compile/internal/ssa/_gen/PPC64Ops.go

    			},
    			typ:            "Mem",
    			faultOnNilArg0: true,
    			faultOnNilArg1: true,
    			unsafePoint:    true,
    		},
    
    		// The following is similar to the LoweredMove, but uses
    		// LXV instead of LXVD2X, which does not require an index
    		// register and will do 4 in a loop instead of only.
    		{
    			name:      "LoweredQuadMove",
    			aux:       "Int64",
    			argLength: 3,
    			reg: regInfo{
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 19:59:38 UTC 2024
    - 43.8K bytes
    - Viewed (0)
  8. gradle/verification-keyring.keys

    O5oY/CFHdkxD8d+cLF8FSNUFMypuDQ4IH9zPYGkUJqsb2t67iMyxi14RqyN2YNqK
    JcwxTL42VBlUFlTBoF2Y3w0LNll6pR2WSNvpcj+5/uBjtY1qAj5e7yVts+d1YZsX
    7D76AV742RQ31kkAEQEAAYkCRAQYAQIADwUCUDFArAIbLgUJB4YfgAEpCRDe4SuY
    lvl+NMBdIAQZAQIABgUCUDFArAAKCRCacW+Ve8QlRhFDB/9xE/cXf5fVaLa598xL
    muXiD9U1B04dPdz445/chdDS9iGWBB+5QVvAqv2Jt0hyPN0+n9Mk/4lLStEEL8TP
    NLdTBP1JRvVWC1c+G3kTJq05Abj8CGFFm1UZhFRwCTJ+vrv8fSb15s+YYxBLIUdl
    Registered: Wed Jun 12 18:38:38 UTC 2024
    - Last Modified: Mon Apr 01 11:46:17 UTC 2024
    - 525.2K bytes
    - Viewed (0)
  9. src/regexp/testdata/re2-exhaustive.txt.bz2

    �h��&�$Ԓ$�%�PF��F�Z��U%dՃ31��Y+&�-#)5���Fjd���&L���-�*�R�Y"l��C*c+�cR9�6��ʩ�,�YK1m��İPJ�Vea*��cRL�1*l����6B 6 �X�V��V-�m���h6˦֪���dJ�G`m&�lU�UZܹ.\������ �2wn���J������j+F�������Ŋ,Qb�����������������V��d�i3j�+�J���X�X�d�lVl��UJ���%APmT[Fƭ�h�lj�1���Z(�1�3j�JYmcc�X����Z4I�`�6��%&�e��+(2��k&)Ẍ́��R�#�,�~|��B�!BD!B�! ff0�!3333"30��������Bf�!K30���!3333,��ff����̳3 ��B3332�p���&ffffffdBff3333332!33 �����������s��9�s��9Z1�c�1�V�c�1�cZ�9�s����9�fffe������������ff...
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 13 14:52:20 UTC 2021
    - 418.2K bytes
    - Viewed (0)
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