// wasm:"F64Copysign"
	sink64[0] = math.Copysign(a, b)

	// amd64:"BTSQ\t[$]63"
	// s390x:"LNDFR\t",-"MOVD\t"     (no integer load/store)
	// ppc64x:"FCPSGN"
	// riscv64:"FSGNJD"
	// arm64:"ORR", -"AND"
	sink64[1] = math.Copysign(c, -1)

	// Like math.Copysign(c, -1), but with integer operations. Useful
	// for platforms that have a copysign opcode to see if it's detected.

	AND	$(1<<63-1), R1                      // AND	$9223372036854775807, R1        // 21f84092
	ORR	$(1<<63), R1                        // ORR	$-9223372036854775808, R1       // 210041b2
	ORR	$(1<<63-1), R1                      // ORR	$9223372036854775807, R1        // 21f840b2
	EOR	$(1<<63), R1                        // EOR	$-9223372036854775808, R1       // 210041d2

	i++
}

// combined arithmetic and rotate on arm64
func checkArithmeticWithRotate(a *[1000]uint64) {
	// arm64: "AND\tR[0-9]+@>51, R[0-9]+, R[0-9]+"
	a[2] = a[1] & bits.RotateLeft64(a[0], 13)
	// arm64: "ORR\tR[0-9]+@>51, R[0-9]+, R[0-9]+"
	a[5] = a[4] | bits.RotateLeft64(a[3], 13)
	// arm64: "EOR\tR[0-9]+@>51, R[0-9]+, R[0-9]+"
	a[8] = a[7] ^ bits.RotateLeft64(a[6], 13)
	// arm64: "MVN\tR[0-9]+@>51, R[0-9]+"

	MULLU	R1,R3,(R6,R5)		// R5:R6:R7 = R1:R2 * R3
	MOVW	$0,R7
	MULALU	R2,R3,(R7,R6)

	// unscale by discarding low 32 bits, shifting the rest by 29
	MOVW	R6>>29,R6		// R6:R7 = (R5:R6:R7 >> 61)
	ORR	R7<<3,R6
	MOVW	R7>>29,R7

	// subtract (10**9 * sec) from nsec to get nanosecond remainder
	MOVW	$1000000000, R5		// 10**9
	MULLU	R6,R5,(R9,R8)		// R8:R9 = R6:R7 * R5
	MULA	R7,R5,R9,R9

	a[1] = ^(y ^ z)

	// arm64:`EON\t`,-`XOR`
	a[2] = x ^ ^z

	// arm64:`EON\t`,-`EOR`,-`MVN`
	return n ^ (m ^ 0xffffffffffffffff)
}

func op_orn(x, y uint32) uint32 {
	// arm64:`ORN\t`,-`ORR`
	return x | ^y
}

// check bitsets
func bitSetPowerOf2Test(x int) bool {
	// amd64:"BTL\t[$]3"
	return x&8 == 8
}

func bitSetTest(x int) bool {
	// amd64:"ANDL\t[$]9, AX"

	ROUND3(Rb, Rc, Rd, Ra,  2, 23, Rc3)

// a += (c^(b|^d)) + X[index] + const
// a = a<<shift | a>>(32-shift) + b
#define ROUND4(Ra, Rb, Rc, Rd, index, shift, Rconst) \
	MVN	Rd, Rt0			; \
	ORR	Rb, Rt0			; \
	EOR	Rc, Rt0			; \
	MOVW	(index<<2)(Rdata), Rt1	; \
	ADD	Rt1, Rt0			; \
	ADD	Rconst, Rt0			; \
	ADD	Rt0, Ra			; \
	ADD	Ra@>(32-shift), Rb, Ra	;

	MOVM.IA.W (Rtable), [Rc0,Rc1,Rc2,Rc3]

{"Name":"ORR (immediate)","Bits":"0|0|1|1|0|0|1|0|0|0|immr:6|imms:6|Rn:5|Rd:5","Arch":"32-bit variant","Syntax":"ORR <Wd|WSP>, <Wn>, #<imm>","Code":"","Alias":"This instruction is used by the alias MOV (bitmask immediate)."},

	ORNW R4@>11, R16, R3                       // 032ee42a
	ORN R22@>19, R3, R3                        // 634cf6aa
	ORRW $4294443071, R15, R24                 // f8490d32
	ORR $-3458764513820540929, R12, R22        // 96f542b2
	ORRW R13<<4, R8, R26                       // 1a110d2a
	ORR R3<<22, R5, R6                         // a65803aa
	PRFM (R8), $25                             // 190180f9
	PRFM (R2), PLDL1KEEP                       // 400080f9

00000330  c3 fb 96 05 bf b5 bd bf  e2 28 07 7e 51 a6 84 90  |.........(.~Q...|
00000340  bf 9e 2e f6 b5 04 8e 06  7a 63 c8 00 84 a1 a3 2c  |........zc.....,|
00000350  f3 6f 52 52 c4 ce 4a 59  31 1f d4 ab 2e f4 75 90  |.oRR..JY1.....u.|
00000360  a5 3b ff ab 20 be 51 92  c5 f4 4d 8b f2 2a a7 ff  |.;.. .Q...M..*..|
00000370  90 07 40 3e d6 9c cf 23  54 d1 65 d3 74 79 af 51  |..@>...#T.e.ty.Q|

	case lex.LSH:
		op = 0
	case lex.RSH:
		op = 1
	case lex.ARR:
		op = 2
	case lex.ROT:
		// following instructions on ARM64 support rotate right
		// AND, ANDS, TST, BIC, BICS, EON, EOR, ORR, MVN, ORN
		op = 3
	}
	tok := p.next()
	str := tok.String()
	var count int16
	switch tok.ScanToken {
	case scanner.Ident:
		if p.arch.Family == sys.ARM64 {