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Results 11 - 20 of 35 for shrxl (1.46 sec)
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src/math/big/arith_386.s
MOVL $0, DX SHRL CX, AX, DX // w1<<ŝ MOVL DX, c+28(FP) MOVL $0, BX // i = 0 JMP E9 // i < n-1 L9: MOVL AX, DX // w = w1 MOVL 4(SI)(BX*4), AX // w1 = x[i+1] SHRL CX, AX, DX // w>>s | w1<<ŝ MOVL DX, (DI)(BX*4) // z[i] = w>>s | w1<<ŝ ADDL $1, BX // i++ E9: CMPL BX, BP JL L9 // i < n-1 // i >= n-1 X9a: SHRL CX, AX // w1>>s
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 19 23:33:27 UTC 2023 - 4K bytes - Viewed (0) -
src/runtime/memmove_plan9_386.s
/* * forward copy loop */ forward: MOVL BX, CX SHRL $2, CX ANDL $3, BX REP; MOVSL JMP tail /* * check overlap */ back: MOVL SI, CX ADDL BX, CX CMPL CX, DI JLS forward /* * whole thing backwards has * adjusted addresses */ ADDL BX, DI ADDL BX, SI STD /* * copy */ MOVL BX, CX SHRL $2, CX ANDL $3, BX SUBL $4, DI SUBL $4, SI
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Jun 04 07:25:06 UTC 2020 - 3.1K bytes - Viewed (0) -
src/runtime/memclr_plan9_386.s
XORL AX, AX tail: TESTL BX, BX JEQ _0 CMPL BX, $2 JBE _1or2 CMPL BX, $4 JB _3 JE _4 CMPL BX, $8 JBE _5through8 CMPL BX, $16 JBE _9through16 MOVL BX, CX SHRL $2, CX REP STOSL ANDL $3, BX JNE tail RET _1or2: MOVB AX, (DI) MOVB AX, -1(DI)(BX*1) RET _0: RET _3: MOVW AX, (DI) MOVB AX, 2(DI) RET _4:
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Jan 29 19:11:07 UTC 2021 - 983 bytes - Viewed (0) -
src/cmd/internal/notsha256/sha256block_386.s
#define MSGSCHEDULE1(index) \ MOVL ((index-2)*4)(BP), AX; \ MOVL AX, CX; \ RORL $17, AX; \ MOVL CX, DX; \ RORL $19, CX; \ SHRL $10, DX; \ MOVL ((index-15)*4)(BP), BX; \ XORL CX, AX; \ MOVL BX, CX; \ XORL DX, AX; \ RORL $7, BX; \ MOVL CX, DX; \ SHRL $3, DX; \ RORL $18, CX; \ ADDL ((index-7)*4)(BP), AX; \ XORL CX, BX; \ XORL DX, BX; \ ADDL ((index-16)*4)(BP), BX; \ ADDL BX, AX; \
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 19 23:33:27 UTC 2023 - 8.2K bytes - Viewed (0) -
src/runtime/memmove_386.s
fwdBy4: // Do 4 bytes at a time MOVL BX, CX SHRL $2, CX ANDL $3, BX REP; MOVSL JMP tail /* * check overlap */ back: MOVL SI, CX ADDL BX, CX CMPL CX, DI JLS forward /* * whole thing backwards has * adjusted addresses */ ADDL BX, DI ADDL BX, SI STD /* * copy */ MOVL BX, CX SHRL $2, CX ANDL $3, BX SUBL $4, DI
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Sat Nov 06 10:24:44 UTC 2021 - 4.4K bytes - Viewed (0) -
src/crypto/sha256/sha256block_386.s
#define MSGSCHEDULE1(index) \ MOVL ((index-2)*4)(BP), AX; \ MOVL AX, CX; \ RORL $17, AX; \ MOVL CX, DX; \ RORL $19, CX; \ SHRL $10, DX; \ MOVL ((index-15)*4)(BP), BX; \ XORL CX, AX; \ MOVL BX, CX; \ XORL DX, AX; \ RORL $7, BX; \ MOVL CX, DX; \ SHRL $3, DX; \ RORL $18, CX; \ ADDL ((index-7)*4)(BP), AX; \ XORL CX, BX; \ XORL DX, BX; \ ADDL ((index-16)*4)(BP), BX; \ ADDL BX, AX; \
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 8.2K bytes - Viewed (0) -
src/runtime/time_windows_386.s
MOVL AX, DI MOVL DX, SI // DI = nano/100/1e9 = nano/1e11 = sec/100, DX = SI = nano/100%1e9 // split DX into seconds and nanoseconds by div 1e7 magic multiply. MOVL DX, AX MOVL $1801439851, CX MULL CX SHRL $22, DX MOVL DX, BX IMULL $10000000, DX MOVL SI, CX SUBL DX, CX // DI = sec/100 (still) // BX = (nano/100%1e9)/1e7 = (nano/1e9)%100 = sec%100 // CX = (nano/100%1e9)%1e7 = (nano%1e9)/100 = nsec/100
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Sep 07 17:19:45 UTC 2023 - 1.7K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/AMD64.rules
((SHLL|SHRL|SARL) x (ADDQconst [c] y)) && c & 31 == 0 => ((SHLL|SHRL|SARL) x y) ((SHLL|SHRL|SARL) x (NEGQ <t> (ADDQconst [c] y))) && c & 31 == 0 => ((SHLL|SHRL|SARL) x (NEGQ <t> y)) ((SHLL|SHRL|SARL) x (ANDQconst [c] y)) && c & 31 == 31 => ((SHLL|SHRL|SARL) x y) ((SHLL|SHRL|SARL) x (NEGQ <t> (ANDQconst [c] y))) && c & 31 == 31 => ((SHLL|SHRL|SARL) x (NEGQ <t> y))
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 12 19:38:41 UTC 2024 - 93.9K bytes - Viewed (0) -
src/runtime/memclr_386.s
MOVOU X0, -96(DI)(BX*1) MOVOU X0, -80(DI)(BX*1) MOVOU X0, -64(DI)(BX*1) MOVOU X0, -48(DI)(BX*1) MOVOU X0, -32(DI)(BX*1) MOVOU X0, -16(DI)(BX*1) RET nosse2: MOVL BX, CX SHRL $2, CX REP STOSL ANDL $3, BX JNE tail
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Sat Nov 06 10:24:44 UTC 2021 - 2.4K bytes - Viewed (0) -
src/internal/bytealg/indexbyte_amd64.s
endofpage: MOVOU -16(SI)(BX*1), X1 // Load data into the high end of X1. PCMPEQB X0, X1 // Compare target byte with each byte in data. PMOVMSKB X1, DX // Move result bits to integer register. MOVL BX, CX SHLL CX, DX SHRL $16, DX // Shift desired bits down to bottom of register. BSFL DX, DX // Find first set bit. JZ failure // No set bit, failure. MOVQ DX, (R8) RET avx2: #ifndef hasAVX2
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Nov 01 19:06:01 UTC 2023 - 3.1K bytes - Viewed (0)