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src/cmd/asm/internal/asm/asm.go
} p.errorf("wrong number of arguments to %s instruction", op) return case 4: if p.arch.Family == sys.S390X || p.arch.Family == sys.PPC64 { // 4-operand compare-and-branch. prog.From = a[0] prog.Reg = p.getRegister(prog, op, &a[1]) prog.AddRestSource(a[2]) target = &a[3] break } p.errorf("wrong number of arguments to %s instruction", op) return default:
Created: Tue Dec 30 11:13:12 GMT 2025 - Last Modified: Tue Oct 21 15:13:08 GMT 2025 - 26.7K bytes - Click Count (0) -
src/cmd/asm/internal/arch/arch.go
const ( RFP = -(iota + 1) RSB RSP RPC ) // Arch wraps the link architecture object with more architecture-specific information. type Arch struct { *obj.LinkArch // Map of instruction names to enumeration. Instructions map[string]obj.As // Map of register names to enumeration. Register map[string]int16 // Table of register prefix names. These are things like R for R(0) and SPR for SPR(268).Created: Tue Dec 30 11:13:12 GMT 2025 - Last Modified: Thu Nov 13 12:17:37 GMT 2025 - 21.7K bytes - Click Count (0) -
LICENSES/vendor/bitbucket.org/bertimus9/systemstat/LICENSE
Copyright (c) 2013 Phillip Bond Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so,
Created: Fri Dec 26 09:05:12 GMT 2025 - Last Modified: Fri May 08 04:49:00 GMT 2020 - 1.2K bytes - Click Count (0) -
LICENSES/vendor/github.com/Azure/go-ansiterm/LICENSE
Copyright (c) 2015 Microsoft Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is
Created: Fri Dec 26 09:05:12 GMT 2025 - Last Modified: Fri May 08 04:49:00 GMT 2020 - 1.2K bytes - Click Count (0) -
src/cmd/asm/internal/asm/testdata/amd64.s
// Copyright 2015 The Go Authors. All rights reserved. // Use of this source code is governed by a BSD-style // license that can be found in the LICENSE file. // This input was created by taking the instruction productions in // the old assembler's (6a's) grammar and hand-writing complete // instructions for each rule, to guarantee we cover the same space. #include "../../../../../runtime/textflag.h" TEXT foo(SB), DUPOK|NOSPLIT, $0
Created: Tue Dec 30 11:13:12 GMT 2025 - Last Modified: Tue Apr 09 18:57:21 GMT 2019 - 3.3K bytes - Click Count (0) -
src/cmd/asm/internal/asm/testdata/386.s
// This input was created by taking the instruction productions in // the old assembler's (8a's) grammar and hand-writing complete // instructions for each rule, to guarantee we cover the same space. #include "../../../../../runtime/textflag.h" TEXT foo(SB), DUPOK|NOSPLIT, $0 // LTYPE1 nonrem { outcode(int($1), &$2); } SETCC AX SETCC foo+4(SB) // LTYPE2 rimnon { outcode(int($1), &$2); } DIVB AX DIVB foo+4(SB) PUSHL $foo+4(SB)
Created: Tue Dec 30 11:13:12 GMT 2025 - Last Modified: Tue Apr 09 18:57:21 GMT 2019 - 2K bytes - Click Count (0) -
src/cmd/asm/internal/arch/arm.go
// Use of this source code is governed by a BSD-style // license that can be found in the LICENSE file. // This file encapsulates some of the odd characteristics of the ARM // instruction set, to minimize its interaction with the core of the // assembler. package arch import ( "strings" "cmd/internal/obj" "cmd/internal/obj/arm" ) var armLS = map[string]uint8{
Created: Tue Dec 30 11:13:12 GMT 2025 - Last Modified: Wed Oct 23 15:18:14 GMT 2024 - 6.1K bytes - Click Count (0) -
src/cmd/asm/internal/asm/testdata/riscv64error.s
MOVWU X5, (X6) // ERROR "unsupported unsigned store" MOVF F0, F1, F2 // ERROR "illegal MOV instruction" MOVD F0, F1, F2 // ERROR "illegal MOV instruction" MOV X10, X11, X12 // ERROR "illegal MOV instruction" MOVW X10, X11, X12 // ERROR "illegal MOV instruction" RORI $64, X5, X6 // ERROR "immediate out of range 0 to 63" SLLI $64, X5, X6 // ERROR "immediate out of range 0 to 63"
Created: Tue Dec 30 11:13:12 GMT 2025 - Last Modified: Wed Sep 24 13:21:53 GMT 2025 - 26.8K bytes - Click Count (0) -
apache-maven/src/main/appended-resources/licenses/MIT.txt
Copyright <YEAR> <COPYRIGHT HOLDER> Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to
Created: Sun Dec 28 03:35:09 GMT 2025 - Last Modified: Fri May 17 19:14:22 GMT 2024 - 1.1K bytes - Click Count (0) -
LICENSES/vendor/github.com/Masterminds/semver/v3/LICENSE
Copyright (C) 2014-2019, Matt Butcher and Matt Farina Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is
Created: Fri Dec 26 09:05:12 GMT 2025 - Last Modified: Sat Nov 01 08:52:09 GMT 2025 - 1.2K bytes - Click Count (0)