- Sort Score
- Result 10 results
- Languages All
Results 11 - 20 of 105 for cmpb (0.28 sec)
-
src/runtime/memclr_amd64.s
TESTQ BX, BX JEQ _0 CMPQ BX, $2 JBE _1or2 CMPQ BX, $4 JBE _3or4 CMPQ BX, $8 JB _5through7 JE _8 CMPQ BX, $16 JBE _9through16 CMPQ BX, $32 JBE _17through32 CMPQ BX, $64 JBE _33through64 CMPQ BX, $128 JBE _65through128 CMPQ BX, $256 JBE _129through256 CMPB internal∕cpu·X86+const_offsetX86HasERMS(SB), $1 // enhanced REP MOVSB/STOSB
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue May 10 20:52:34 UTC 2022 - 4.9K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/AMD64splitload.rules
(CMP(Q|L|W|B)loadidx1 {sym} [off] ptr idx x mem) => (CMP(Q|L|W|B) (MOV(Q|L|W|B)loadidx1 {sym} [off] ptr idx mem) x) (CMPQloadidx8 {sym} [off] ptr idx x mem) => (CMPQ (MOVQloadidx8 {sym} [off] ptr idx mem) x) (CMPLloadidx4 {sym} [off] ptr idx x mem) => (CMPL (MOVLloadidx4 {sym} [off] ptr idx mem) x) (CMPWloadidx2 {sym} [off] ptr idx x mem) => (CMPW (MOVWloadidx2 {sym} [off] ptr idx mem) x)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Oct 04 19:35:46 UTC 2022 - 3.4K bytes - Viewed (0) -
src/internal/bytealg/indexbyte_amd64.s
MOVQ DX, (R8) RET avx2: #ifndef hasAVX2 CMPB internal∕cpu·X86+const_offsetX86HasAVX2(SB), $1 JNE sse #endif MOVD AX, X0 LEAQ -32(SI)(BX*1), R11 VPBROADCASTB X0, Y1 PCALIGN $32 avx2_loop: VMOVDQU (DI), Y2 VPCMPEQB Y1, Y2, Y3 VPTEST Y3, Y3 JNZ avx2success ADDQ $32, DI CMPQ DI, R11 JLT avx2_loop MOVQ R11, DI VMOVDQU (DI), Y2
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Nov 01 19:06:01 UTC 2023 - 3.1K bytes - Viewed (0) -
src/runtime/preempt_amd64.s
MOVQ DI, 40(SP) MOVQ R8, 48(SP) MOVQ R9, 56(SP) MOVQ R10, 64(SP) MOVQ R11, 72(SP) MOVQ R12, 80(SP) MOVQ R13, 88(SP) MOVQ R14, 96(SP) MOVQ R15, 104(SP) #ifdef GOOS_darwin #ifndef hasAVX CMPB internal∕cpu·X86+const_offsetX86HasAVX(SB), $0 JE 2(PC) #endif VZEROUPPER #endif MOVUPS X0, 112(SP) MOVUPS X1, 128(SP) MOVUPS X2, 144(SP) MOVUPS X3, 160(SP) MOVUPS X4, 176(SP) MOVUPS X5, 192(SP)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Aug 18 17:17:01 UTC 2022 - 1.7K bytes - Viewed (0) -
src/crypto/internal/bigmod/_asm/nat_amd64_asm.go
addMulVVW(1536) addMulVVW(2048) Generate() } func addMulVVW(bits int) { if bits%64 != 0 { panic("bit size unsupported") } Implement("addMulVVW" + strconv.Itoa(bits)) CMPB(Mem{Symbol: Symbol{Name: "·supportADX"}, Base: StaticBase}, Imm(1)) JEQ(LabelRef("adx")) z := Mem{Base: Load(Param("z"), GP64())} x := Mem{Base: Load(Param("x"), GP64())} y := Load(Param("y"), GP64())
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 24 22:37:58 UTC 2023 - 2.5K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewrite386splitload.go
} func rewriteValue386splitload_Op386CMPBload(v *Value) bool { v_2 := v.Args[2] v_1 := v.Args[1] v_0 := v.Args[0] b := v.Block typ := &b.Func.Config.Types // match: (CMPBload {sym} [off] ptr x mem) // result: (CMPB (MOVBload {sym} [off] ptr mem) x) for { off := auxIntToInt32(v.AuxInt) sym := auxToSym(v.Aux) ptr := v_0 x := v_1 mem := v_2 v.reset(Op386CMPB) v0 := b.NewValue0(v.Pos, Op386MOVBload, typ.UInt8)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Jan 19 22:42:34 UTC 2023 - 4K bytes - Viewed (0) -
src/internal/bytealg/index_amd64.s
loop3: MOVW (DI), SI CMPW SI,R8 JZ partial_success3 ADDQ $1,DI CMPQ DI,DX JB loop3 JMP fail partial_success3: MOVW 1(DI), SI CMPW SI,BX JZ success ADDQ $1,DI CMPQ DI,DX JB loop3 JMP fail _4_or_more: CMPQ AX, $4 JA _5_or_more MOVL (R8), R8 LEAQ -3(DI)(DX*1), DX loop4: MOVL (DI), SI CMPL SI,R8 JZ success ADDQ $1,DI CMPQ DI,DX JB loop4 JMP fail
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Aug 07 00:20:48 UTC 2023 - 5.1K bytes - Viewed (0) -
src/runtime/memmove_386.s
TESTL BX, BX JEQ move_0 CMPL BX, $2 JBE move_1or2 CMPL BX, $4 JB move_3 JE move_4 CMPL BX, $8 JBE move_5through8 CMPL BX, $16 JBE move_9through16 #ifdef GO386_softfloat JMP nosse2 #endif CMPL BX, $32 JBE move_17through32 CMPL BX, $64 JBE move_33through64 CMPL BX, $128 JBE move_65through128 nosse2: /*
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Sat Nov 06 10:24:44 UTC 2021 - 4.4K bytes - Viewed (0) -
src/cmd/internal/obj/ppc64/anames.go
"FRIZ", "FRIZCC", "FRIN", "FRINCC", "FRSQRTE", "FRSQRTECC", "FSEL", "FSELCC", "FSQRT", "FSQRTCC", "FSQRTS", "FSQRTSCC", "CNTLZD", "CNTLZDCC", "CMPW", "CMPWU", "CMPB", "FTDIV", "FTSQRT", "DIVD", "DIVDCC", "DIVDE", "DIVDECC", "DIVDEU", "DIVDEUCC", "DIVDVCC", "DIVDV", "DIVDU", "DIVDUCC", "DIVDUVCC", "DIVDUV",
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Apr 01 18:50:29 UTC 2024 - 6.7K bytes - Viewed (0) -
test/codegen/switch.go
// See issue 53333. func mimetype(ext string) string { // amd64: `CMPB\s1\(.*\), \$104$`,-`cmpstring` // arm64: `MOVB\s1\(R.*\), R.*$`, `CMPW\s\$104, R.*$`, -`cmpstring` switch ext { // amd64: `CMPL\s\(.*\), \$1836345390$` // arm64: `MOVD\s\$1836345390`, `CMPW\sR.*, R.*$` case ".htm": return "A" // amd64: `CMPL\s\(.*\), \$1953457454$` // arm64: `MOVD\s\$1953457454`, `CMPW\sR.*, R.*$` case ".eot": return "B"
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Oct 09 18:39:50 UTC 2023 - 3.6K bytes - Viewed (0)