{Name: "aesctr", Feature: &S390X.HasAESCTR},
		{Name: "aesgcm", Feature: &S390X.HasAESGCM},
		{Name: "ghash", Feature: &S390X.HasGHASH},
		{Name: "sha1", Feature: &S390X.HasSHA1},
		{Name: "sha256", Feature: &S390X.HasSHA256},
		{Name: "sha3", Feature: &S390X.HasSHA3},
		{Name: "sha512", Feature: &S390X.HasSHA512},
		{Name: "vx", Feature: &S390X.HasVX},
		{Name: "vxe", Feature: &S390X.HasVXE},
	}
}

	// s390x:"CGIJ\t[$]12, R[0-9]+, [$]127, "
	for i := doNotOptimize; i < 128; i++ {
		dummy()
	}

	// s390x:"CGIJ\t[$]10, R[0-9]+, [$]-128, "
	for i := doNotOptimize; i > -129; i-- {
		dummy()
	}

	// s390x:"CGIJ\t[$]2, R[0-9]+, [$]127, "
	for i := doNotOptimize; i >= 128; i++ {
		dummy()
	}

	// s390x:"CGIJ\t[$]4, R[0-9]+, [$]-128, "

	options = []option{
		{Name: "zarch", Feature: &S390X.HasZARCH},
		{Name: "stfle", Feature: &S390X.HasSTFLE},
		{Name: "ldisp", Feature: &S390X.HasLDISP},
		{Name: "msa", Feature: &S390X.HasMSA},
		{Name: "eimm", Feature: &S390X.HasEIMM},
		{Name: "dfp", Feature: &S390X.HasDFP},
		{Name: "etf3eh", Feature: &S390X.HasETF3EH},
		{Name: "vx", Feature: &S390X.HasVX},
		{Name: "vxe", Feature: &S390X.HasVXE},

func si1c(c <-chan int64) {
	// amd64:"CMPQ\t.+, [$]256"
	// s390x:"CLGIJ\t[$]12, R[0-9]+, [$]255"
	for x := <-c; x >= 0 && x < 256; x = <-c {
	}
}

func si2c(c <-chan int32) {
	// amd64:"CMPL\t.+, [$]256"
	// s390x:"CLIJ\t[$]12, R[0-9]+, [$]255"
	for x := <-c; x >= 0 && x < 256; x = <-c {
	}
}

func si3c(c <-chan int16) {
	// amd64:"CMPW\t.+, [$]256"
	// s390x:"CLIJ\t[$]12, R[0-9]+, [$]255"

		// result: (BRC {c&^s390x.Unordered} x yes no)
		for b.Controls[0].Op == OpS390XCMPU {
			x := b.Controls[0]
			c := auxToS390xCCMask(b.Aux)
			if !(c&s390x.Unordered != 0) {
				break
			}
			b.resetWithControl(BlockS390XBRC, x)
			b.Aux = s390xCCMaskToAux(c &^ s390x.Unordered)
			return true
		}
		// match: (BRC {c} x:(CMPWU _ _) yes no)
		// cond: c&s390x.Unordered != 0

		switch t.Size() {
		case 4:
			return s390x.AFMOVS
		case 8:
			return s390x.AFMOVD
		}
	} else {
		switch t.Size() {
		case 1:
			if t.IsSigned() {
				return s390x.AMOVB
			} else {
				return s390x.AMOVBZ
			}
		case 2:
			if t.IsSigned() {
				return s390x.AMOVH
			} else {
				return s390x.AMOVHZ
			}
		case 4:
			if t.IsSigned() {
				return s390x.AMOVW
			} else {
				return s390x.AMOVWZ

	// amd64:"ROUNDSD\t[$]2"
	// s390x:"FIDBR\t[$]6"
	// arm64:"FRINTPD"
	// ppc64x:"FRIP"
	// wasm:"F64Ceil"
	sink64[0] = math.Ceil(x)

	// amd64/v2:-".*x86HasSSE41" amd64/v3:-".*x86HasSSE41"
	// amd64:"ROUNDSD\t[$]1"
	// s390x:"FIDBR\t[$]7"
	// arm64:"FRINTMD"
	// ppc64x:"FRIM"
	// wasm:"F64Floor"
	sink64[1] = math.Floor(x)

	// s390x:"FIDBR\t[$]1"
	// arm64:"FRINTAD"
	// ppc64x:"FRIN"

// Use of this source code is governed by a BSD-style
// license that can be found in the LICENSE file.

package s390x

import (
	"cmd/compile/internal/ssagen"
	"cmd/internal/obj/s390x"
)

func Init(arch *ssagen.ArchInfo) {
	arch.LinkArch = &s390x.Links390x
	arch.REGSP = s390x.REGSP
	arch.MAXWIDTH = 1 << 50

	arch.ZeroRange = zerorange
	arch.Ginsnop = ginsnop

	arch.SSAMarkMoves = ssaMarkMoves

	"loong64":  loong64.Init,
	"mips":     mips.Init,
	"mipsle":   mips.Init,
	"mips64":   mips64.Init,
	"mips64le": mips64.Init,
	"ppc64":    ppc64.Init,
	"ppc64le":  ppc64.Init,
	"riscv64":  riscv64.Init,
	"s390x":    s390x.Init,
	"wasm":     wasm.Init,
}

func main() {
	// disable timestamps for reproducible output
	log.SetFlags(0)
	log.SetPrefix("compile: ")

	buildcfg.Check()

	// ctrAble and gcmAble interfaces. We therefore need to check
	// for all the features required to implement these modes.
	// Keep in sync with crypto/tls/common.go.
	if !(cpu.S390X.HasAES && cpu.S390X.HasAESCBC && cpu.S390X.HasAESCTR && (cpu.S390X.HasGHASH || cpu.S390X.HasAESGCM)) {
		return newCipherGeneric(key)
	}

	var function code
	switch len(key) {
	case 128 / 8:
		function = aes128
	case 192 / 8:
		function = aes192