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Results 1 - 10 of 17 for HasAES (0.33 sec)
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src/internal/cpu/cpu_arm64.go
return (uint)(data>>start) & ((1 << (end - start + 1)) - 1) } func parseARM64SystemRegisters(isar0 uint64) { // ID_AA64ISAR0_EL1 switch extractBits(isar0, 4, 7) { case 1: ARM64.HasAES = true case 2: ARM64.HasAES = true ARM64.HasPMULL = true } switch extractBits(isar0, 8, 11) { case 1: ARM64.HasSHA1 = true } switch extractBits(isar0, 12, 15) { case 1: ARM64.HasSHA2 = true
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 25 14:08:20 UTC 2023 - 1.6K bytes - Viewed (0) -
src/vendor/golang.org/x/sys/cpu/cpu_arm64.go
parseARM64SystemRegisters(getisar0(), getisar1(), getpfr0()) } func parseARM64SystemRegisters(isar0, isar1, pfr0 uint64) { // ID_AA64ISAR0_EL1 switch extractBits(isar0, 4, 7) { case 1: ARM64.HasAES = true case 2: ARM64.HasAES = true ARM64.HasPMULL = true } switch extractBits(isar0, 8, 11) { case 1: ARM64.HasSHA1 = true } switch extractBits(isar0, 12, 15) { case 1: ARM64.HasSHA2 = true
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 08 16:12:58 UTC 2024 - 3.9K bytes - Viewed (0) -
src/internal/cpu/cpu.go
// HasAVX and HasAVX2 are only set if the OS does support XMM and YMM registers // in addition to the cpuid feature bit being set. // The struct is padded to avoid false sharing. var X86 struct { _ CacheLinePad HasAES bool HasADX bool HasAVX bool HasAVX2 bool HasAVX512F bool HasAVX512BW bool HasAVX512VL bool HasBMI1 bool HasBMI2 bool HasERMS bool HasFMA bool
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 15 19:57:43 UTC 2024 - 7.1K bytes - Viewed (0) -
src/internal/cpu/cpu_arm64_darwin.go
// to detect their supported state dynamically. Assume the CPU features that // Apple Silicon M1 supports to be available as a minimal set of features // to all Go programs running on darwin/arm64. ARM64.HasAES = true ARM64.HasPMULL = true ARM64.HasSHA1 = true ARM64.HasSHA2 = true } //go:noescape func getsysctlbyname(name []byte) (int32, int32) // sysctlEnabled should be an internal detail,
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 29 16:25:21 UTC 2024 - 1.3K bytes - Viewed (0) -
src/crypto/aes/cipher_asm.go
// Instances of this type only exist when hasGCMAsm returns true. Likewise, // the gcmAble implementation is in aes_gcm.go. type aesCipherGCM struct { aesCipherAsm } var supportsAES = cpu.X86.HasAES || cpu.ARM64.HasAES || goarch.IsPpc64 == 1 || goarch.IsPpc64le == 1 var supportsGFMUL = cpu.X86.HasPCLMULQDQ || cpu.ARM64.HasPMULL func newCipher(key []byte) (cipher.Block, error) { if !supportsAES { return newCipherGeneric(key)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 25 14:58:19 UTC 2024 - 3K bytes - Viewed (0) -
src/vendor/golang.org/x/sys/cpu/cpu_s390x.go
{Name: "eimm", Feature: &S390X.HasEIMM, Required: true}, {Name: "dfp", Feature: &S390X.HasDFP}, {Name: "etf3eh", Feature: &S390X.HasETF3EH}, {Name: "msa", Feature: &S390X.HasMSA}, {Name: "aes", Feature: &S390X.HasAES}, {Name: "aescbc", Feature: &S390X.HasAESCBC}, {Name: "aesctr", Feature: &S390X.HasAESCTR}, {Name: "aesgcm", Feature: &S390X.HasAESGCM}, {Name: "ghash", Feature: &S390X.HasGHASH},
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Nov 02 15:41:00 UTC 2020 - 4.9K bytes - Viewed (0) -
src/vendor/golang.org/x/sys/cpu/cpu_x86.go
//go:build 386 || amd64 || amd64p32 package cpu import "runtime" const cacheLineSize = 64 func initOptions() { options = []option{ {Name: "adx", Feature: &X86.HasADX}, {Name: "aes", Feature: &X86.HasAES}, {Name: "avx", Feature: &X86.HasAVX}, {Name: "avx2", Feature: &X86.HasAVX2}, {Name: "avx512", Feature: &X86.HasAVX512}, {Name: "avx512f", Feature: &X86.HasAVX512F}, {Name: "avx512cd", Feature: &X86.HasAVX512CD},
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 19 23:33:33 UTC 2023 - 4.9K bytes - Viewed (0) -
src/vendor/golang.org/x/sys/cpu/cpu_linux_arm.go
ARM.HasIDIVA = isSet(hwCap, hwcap_IDIVA) ARM.HasIDIVT = isSet(hwCap, hwcap_IDIVT) ARM.HasVFPD32 = isSet(hwCap, hwcap_VFPD32) ARM.HasLPAE = isSet(hwCap, hwcap_LPAE) ARM.HasEVTSTRM = isSet(hwCap, hwcap_EVTSTRM) ARM.HasAES = isSet(hwCap2, hwcap2_AES) ARM.HasPMULL = isSet(hwCap2, hwcap2_PMULL) ARM.HasSHA1 = isSet(hwCap2, hwcap2_SHA1) ARM.HasSHA2 = isSet(hwCap2, hwcap2_SHA2) ARM.HasCRC32 = isSet(hwCap2, hwcap2_CRC32) }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Feb 19 21:26:10 UTC 2020 - 1.4K bytes - Viewed (0) -
src/internal/cpu/cpu_x86.go
// edx bits for CPUID 0x80000001 cpuid_RDTSCP = 1 << 27 ) var maxExtendedFunctionInformation uint32 func doinit() { options = []option{ {Name: "adx", Feature: &X86.HasADX}, {Name: "aes", Feature: &X86.HasAES}, {Name: "erms", Feature: &X86.HasERMS}, {Name: "pclmulqdq", Feature: &X86.HasPCLMULQDQ}, {Name: "rdtscp", Feature: &X86.HasRDTSCP}, {Name: "sha", Feature: &X86.HasSHA}, } level := getGOAMD64level()
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 13:40:20 UTC 2024 - 5.8K bytes - Viewed (0) -
src/crypto/aes/cipher_s390x.go
// ctrAble and gcmAble interfaces. We therefore need to check // for all the features required to implement these modes. // Keep in sync with crypto/tls/common.go. if !(cpu.S390X.HasAES && cpu.S390X.HasAESCBC && cpu.S390X.HasAESCTR && (cpu.S390X.HasGHASH || cpu.S390X.HasAESGCM)) { return newCipherGeneric(key) } var function code switch len(key) { case 128 / 8: function = aes128
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 2.6K bytes - Viewed (0)