@REM POM location, if supplied.

set FILE_ARG=
:arg_loop
if "%~1" == "-f" (
  set "FILE_ARG=%~2"
  shift
  goto process_file_arg
)
if "%~1" == "--file" (
  set "FILE_ARG=%~2"
  shift
  goto process_file_arg
)
@REM If none of the above, skip the argument
shift
if not "%~1" == "" (
  goto arg_loop
) else (
  goto findBaseDir
)

:process_file_arg
if "%FILE_ARG%" == "" (

	RLDICR $0, R5, $59, R8 // Adjust addr to 16 byte container
	VLOADSWAP(R8, R0, V0, V0) // Load 16 bytes @R8 into V0
	SLD    $3, R9          // Set up shift count for VSLO
	MTVSRD R9, V8         // Set up shift count for VSLO
	VSLDOI $8, V8, V8, V8
	VSLO   V0, V8, V0      // Shift by start byte

	VAND V0, SEPMASK, V0 // Mask separator (< 16)
	BR   index2plus

sepcross16:

		funcProps.ResultFlags[i] = ResultPropBits(v)
	}
	return &funcProps
}

func readULEB128(sl []byte) (value uint64, rsl []byte) {
	var shift uint

	for {
		b := sl[0]
		sl = sl[1:]
		value |= (uint64(b&0x7F) << shift)
		if b&0x80 == 0 {
			break
		}
		shift += 7
	}
	return value, sl
}

func writeUleb128(sb *strings.Builder, v uint64) {
	if v < 128 {
		sb.WriteByte(uint8(v))
		return
	}

// Test simple select.

package main

var counter uint
var shift uint

func GetValue() uint {
	counter++
	return 1 << shift
}

func Send(a, b chan uint) int {
	var i int

LOOP:
	for {
		select {
		case a <- GetValue():
			i++
			a = nil
		case b <- GetValue():
			i++
			b = nil
		default:
			break LOOP
		}
		shift++
	}
	return i
}

func main() {

	case isPowerOfTwo(et.Size_):
		var shift uintptr
		if goarch.PtrSize == 8 {
			// Mask shift for better code generation.
			shift = uintptr(sys.TrailingZeros64(uint64(et.Size_))) & 63
		} else {
			shift = uintptr(sys.TrailingZeros32(uint32(et.Size_))) & 31
		}
		lenmem = uintptr(oldLen) << shift
		newlenmem = uintptr(newLen) << shift
		capmem = roundupsize(uintptr(newcap)<<shift, noscan)

#define ROUND1(a, b, c, d, index, const, shift) \
	ADD	$const, index, R9; \
	ADD	R9, a; \
	AND     b, c, R9; \
	ANDN    b, d, R31; \
	OR	R9, R31, R9; \
	ADD	R9, a; \
	ROTLW	$shift, a; \
	ADD	b, a;

#define ROUND2(a, b, c, d, index, const, shift) \
	ADD	$const, index, R9; \
	ADD	R9, a; \
	AND	b, d, R31; \
	ANDN	d, c, R9; \
	OR	R9, R31; \
	ADD	R31, a; \
	ROTLW	$shift, a; \
	ADD	b, a;

	// CMN <Wn|WSP>, #<imm>{, <shift>}
	{0xff00001f, 0x3100001f, CMN, instArgs{arg_Wns, arg_IAddSub}, nil},
	// ADDS <Wd>, <Wn|WSP>, #<imm>{, <shift>}
	{0xff000000, 0x31000000, ADDS, instArgs{arg_Wd, arg_Wns, arg_IAddSub}, nil},
	// CMN <Xn|SP>, #<imm>{, <shift>}
	{0xff00001f, 0xb100001f, CMN, instArgs{arg_Xns, arg_IAddSub}, nil},
	// ADDS <Xd>, <Xn|SP>, #<imm>{, <shift>}

(Avg32u <t> x y) => (ADD (SRLconst <t> (SUB <t> x y) [1]) y)

(And(32|16|8) ...) => (AND ...)
(Or(32|16|8) ...) => (OR ...)
(Xor(32|16|8) ...) => (XOR ...)

// constant shifts
// generic opt rewrites all constant shifts to shift by Const64
(Lsh32x64  x (Const64 [c])) && uint32(c) < 32 => (SLLconst x [int32(c)])
(Rsh32x64  x (Const64 [c])) && uint32(c) < 32 => (SRAconst x [int32(c)])

		}
	}
	return 0, false
}

// ARM64RegisterShift constructs an ARM64 register with shift operation.
func ARM64RegisterShift(reg, op, count int16) (int64, error) {
	// the base register of shift operations must be general register.
	if reg > arm64.REG_R31 || reg < arm64.REG_R0 {
		return 0, errors.New("invalid register for shift operation")
	}
	return int64(reg&31)<<16 | int64(op)<<22 | int64(uint16(count)), nil
}

		{name: "SLLIW", argLength: 1, reg: gp11, asm: "SLLIW", aux: "Int64"}, // arg0 << auxint, shift amount 0-31, logical left shift of 32 bit value, sign extended to 64 bits
		{name: "SRAI", argLength: 1, reg: gp11, asm: "SRAI", aux: "Int64"},   // arg0 >> auxint, shift amount 0-63, arithmetic right shift