* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */
package org.gradle.integtests.tooling.r15


import org.gradle.integtests.tooling.fixture.ToolingApiSpecification
import spock.lang.Issue

class CombiningCommandLineArgumentsCrossVersionSpec extends ToolingApiSpecification {

    @Issue("GRADLE-2635")

	MOVD	p_len+16(FP), R2
	AND	$~63, R2
	CBZ	R2, zero

	ADD	R1, R2, R21
	LDPW	(0*8)(R0), (R4, R5)
	LDPW	(1*8)(R0), (R6, R7)

loop:
	MOVW	R4, R12
	MOVW	R5, R13
	MOVW	R6, R14
	MOVW	R7, R15

	MOVW	(0*4)(R1), R8
	MOVW	R7, R9

#define ROUND1(a, b, c, d, index, const, shift) \
	ADDW	$const, a; \
	ADDW	R8, a; \
	MOVW	(index*4)(R1), R8; \
	EORW	c, R9; \
	ANDW	b, R9; \
	EORW	d, R9; \

	P8_STXVB16X(V15, MASK_PTR, R0)
	CMP	IN_LEN, $8
	BLT	next4
	MOVD	0(MASK_PTR), R14
	MOVD	0(BLK_INP), R15
	XOR	R14, R15, R14
	MOVD	R14, 0(BLK_OUT)
	ADD	$8, R16
	ADD	$-8, IN_LEN
next4:
	CMP	IN_LEN, $4
	BLT	next2
	MOVWZ	(BLK_INP)(R16), R15
	MOVWZ	(MASK_PTR)(R16), R14
	XOR	R14, R15, R14
	MOVW	R14, (R16)(BLK_OUT)
	ADD	$4, R16
	ADD	$-4, IN_LEN
next2:
	CMP	IN_LEN, $2
	BLT	next1

func (c *sigctxt) r12() uint64 { return c.regs().mc_r12 }
func (c *sigctxt) r13() uint64 { return c.regs().mc_r13 }
func (c *sigctxt) r14() uint64 { return c.regs().mc_r14 }
func (c *sigctxt) r15() uint64 { return c.regs().mc_r15 }

//go:nosplit
//go:nowritebarrierrec
func (c *sigctxt) rip() uint64 { return c.regs().mc_rip }

func (c *sigctxt) rflags() uint64  { return c.regs().mc_rflags }

func (c *sigctxt) r12() uint64 { return c.regs().mc_r12 }
func (c *sigctxt) r13() uint64 { return c.regs().mc_r13 }
func (c *sigctxt) r14() uint64 { return c.regs().mc_r14 }
func (c *sigctxt) r15() uint64 { return c.regs().mc_r15 }

//go:nosplit
//go:nowritebarrierrec
func (c *sigctxt) rip() uint64 { return c.regs().mc_rip }

func (c *sigctxt) rflags() uint64  { return c.regs().mc_rflags }

#define CALC_159 \
	ADDL 0x27c(R15),SI \
	LEAL (SI)(AX*1), SI \
	RORXL $0x1b, DI, R12 \
	PRECALC_39(Y12,0x60,0x260) \
	ADDL R12, SI



#define CALC \
	MOVL	(R9), CX \
	MOVL	4(R9), SI \
	MOVL	8(R9), DI \
	MOVL	12(R9), AX \
	MOVL	16(R9), DX \
	MOVQ    SP, R14 \
	LEAQ    (2*4*80+32)(SP), R15 \
	PRECALC \ // Precalc WK for first 2 blocks

	MOVD  R14, R7               // save r14
	MOVD  R15, R8               // save r15
	MOVWZ 16(R0), R9
	MOVWZ 544(R9), R9
	MOVWZ 24(R9), R9            // call vector in r9
	ADD   R2, R9                // add offset to vector table
	MOVWZ (R9), R9              // r9 points to entry point
	BYTE  $0x0D                 // BL R14,R9 --> basr r14,r9
	BYTE  $0xE9                 // clobbers 0,1,14,15
	MOVD  R8, R15               // restore 15

	MOVL	(0*4)(BP),	AX
	MOVL	(1*4)(BP),	BX
	MOVL	(2*4)(BP),	CX
	MOVL	(3*4)(BP),	DX
	MOVL	$0xffffffff,	R11

	CMPQ	SI,		DI
	JEQ	end

loop:
	MOVL	AX,		R12
	MOVL	BX,		R13
	MOVL	CX,		R14
	MOVL	DX,		R15

	MOVL	(0*4)(SI),	R8
	MOVL	DX,		R9

#define ROUND1(a, b, c, d, index, const, shift) \
	XORL	c, R9; \
	ADDL	$const, a; \
	ADDL	R8, a; \
	ANDL	b, R9; \
	XORL	d, R9; \
	MOVL	(index*4)(SI), R8; \

	MOVW 36(R13), R8
	MOVW 32(R13), R7
	MOVW 28(R13), R6
	MOVW 24(R13), R5
	MOVW 20(R13), R4
	MOVW 16(R13), R3
	MOVW 12(R13), R2
	MOVW 8(R13), R1
	MOVW 4(R13), R0
	MOVW 188(R13), R14
	MOVW.P 192(R13), R15

func (c *sigctxt) r12() uint64 { return c.regs().sc_r12 }
func (c *sigctxt) r13() uint64 { return c.regs().sc_r13 }
func (c *sigctxt) r14() uint64 { return c.regs().sc_r14 }
func (c *sigctxt) r15() uint64 { return c.regs().sc_r15 }

//go:nosplit
//go:nowritebarrierrec
func (c *sigctxt) rip() uint64 { return c.regs().sc_rip }

func (c *sigctxt) rflags() uint64  { return c.regs().sc_rflags }