}

// Verify SpaceToBatchND with input tensor of element type f16. This test case is derived from 'fourdim_space_to_batch_nd'. It checks the output
// tensor shape and element type in a few lines in the resulting lowering.
// CHECK-LABEL: space_to_batch_nd_element_type_f16
func.func @space_to_batch_nd_element_type_f16(%input: tensor<3x5x7x10xf16>, %block_shape: tensor<2xi64>, %paddings: tensor<2x2xi64>) -> tensor<?x?x?x10xf16> {

November weather. As much mud in the streets as if the waters had but newly retired from the face of the earth, and it would not be wonderful to meet a Megalosaurus, forty feet long or so, waddling like an elephantine lizard up Holborn Hill. Smoke lowering down from chimney-pots, making a soft black drizzle, with flakes of soot in it as big as full-grown snowflakes—gone into mourning, one might imagine, for the death of the sun. Dogs, undistinguishable in mire. Horses, scarcely better; splashed to...

				// the old definition and the new definition match.
				// For example, (add x x).  Equality is just pointer equality
				// on Values (so cse is important to do before lowering).
				rr.add(breakf("%s != %s", arg, rhs))
			} else {
				if arg != rhs {
					rr.add(declf(rr.Loc, arg, "%s", rhs))
				}
			}
			continue
		}
		// compound sexpr

	// register (R5), and the unwinder currently doesn't understand.
	// Make it SPWRITE to stop unwinding. (See issue 54332)
	// Use OR R0, R1 instead of MOVD R1, R1 as the MOVD instruction
	// has a special affect on Power8,9,10 by lowering the thread 
	// priority and causing a slowdown in execution time

	OR	R0, R1
	MOVD	R0, R11
	BR	runtime·morestack(SB)

// reflectcall: call a function with the given argument list

(RoundToEven ...) => (FRINTND ...)
(Trunc       ...) => (FRINTZD ...)
(FMA       x y z) => (FMADDD z x y)

(Sqrt32 ...) => (FSQRTS ...)

(Min(64|32)F ...) => (FMIN(D|S) ...)
(Max(64|32)F ...) => (FMAX(D|S) ...)

// lowering rotates
// we do rotate detection in generic rules, if the following rules need to be changed, check generic rules first.

    if (is_output_shape_dynamic && is_broadcast_shape_dynamic)
      return rewriter.notifyMatchFailure(
          loc, "output_rank or broadcast_to shape not supported");

    // Allow lowering when the input's elements type is F32, BFloat16, I32 or
    // I16.
    if (!(mlir::isa<BFloat16Type, Float32Type>(element_type) ||
          element_type.isInteger(32) || element_type.isInteger(16)))

- [`KT-57100`](https://youtrack.jetbrains.com/issue/KT-57100) K2 does not report Conflicting overloads and backend crashes with Exception during IR lowering on conflict overloading with suspend function
- [`KT-59955`](https://youtrack.jetbrains.com/issue/KT-59955) K2: Disappeared INCOMPATIBLE_MODIFIERS

// of this conversion is:
// a' = (ADDCC x y)
// a  = (Select0 a')
// b  = (CMPconst [0] a)
// c  = (OR a z)
//
// Which makes it trivial to rewrite b using a lowering rule.
func convertPPC64OpToOpCC(op *Value) *Value {
	ccOpMap := map[Op]Op{
		OpPPC64ADD:      OpPPC64ADDCC,
		OpPPC64ADDconst: OpPPC64ADDCCconst,
		OpPPC64AND:      OpPPC64ANDCC,

  }
  return expanded_input;
}

#include "tensorflow/compiler/mlir/lite/stablehlo/transforms/generated_legalize_hlo.inc"

/// Performs the lowering to TF dialect.
void LegalizeHloToTf::runOnOperation() {
  MLIRContext& context = getContext();
  mlir::ModuleOp module = getOperation();

  RewritePatternSet patterns(&getContext());

}

bool StridedSliceOp::GetSlicedBoundRanges(
    SmallVectorImpl<int64_t> *slice_begin, SmallVectorImpl<int64_t> *slice_end,
    SmallVectorImpl<int64_t> *slice_stride) {
  // TODO(hinsu): Support lowering for ops with dynamic begin and end values
  // when it is possible to derive indices based on mask attributes.
  DenseIntElementsAttr sparse_begin_attr, sparse_end_attr, sparse_strides_attr;