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Results 1 - 6 of 6 for VS2 (0.08 seconds)

  2. github.com/golang/go

    src/cmd/asm/internal/asm/testdata/ppc64_p10.s 

    	XVF16GER2NN VS1, VS2, A1                // ec811690
	XVF16GER2NP VS1, VS2, A1                // ec811290
	XVF16GER2PN VS1, VS2, A1                // ec811490
	XVF16GER2PP VS1, VS2, A1                // ec811090
	XVF32GER VS1, VS2, A1                   // ec8110d8
	XVF32GERNN VS1, VS2, A1                 // ec8116d0
	XVF32GERNP VS1, VS2, A1                 // ec8112d0
    Created: Tue Dec 30 11:13:12 GMT 2025
    - Last Modified: Thu Mar 23 20:52:57 GMT 2023
    - 14.3K bytes
    - Click Count (0)
  3. github.com/golang/go

    src/cmd/asm/internal/asm/testdata/riscv64validation.s 

    	VFNCVTXUFW	X10, V3				// ERROR "expected vector register in vs2 position"
	VFNCVTXFW	X10, V3				// ERROR "expected vector register in vs2 position"
	VFNCVTRTZXUFW	X10, V3				// ERROR "expected vector register in vs2 position"
	VFNCVTRTZXFW	X10, V3				// ERROR "expected vector register in vs2 position"
	VFNCVTFXUW	X10, V3				// ERROR "expected vector register in vs2 position"
    Created: Tue Dec 30 11:13:12 GMT 2025
    - Last Modified: Thu Nov 13 12:17:37 GMT 2025
    - 42.1K bytes
    - Click Count (0)
  4. github.com/golang/go

    src/cmd/asm/internal/asm/testdata/ppc64.s 

    	XXLOR VS1, VS2, VS3             // f0611490
	XXLORC VS1, VS2, VS3            // f0611550
	XXLORQ VS1, VS2, VS3            // f0611490
	XXLXOR VS1, VS2, VS3            // f06114d0
	XXSEL VS1, VS2, VS3, VS4        // f08110f0
	XXSEL VS33, VS34, VS35, VS36    // f08110ff
	XXSEL V1, V2, V3, V4            // f08110ff
	XXMRGHW VS1, VS2, VS3           // f0611090
	XXMRGLW VS1, VS2, VS3           // f0611190
    Created: Tue Dec 30 11:13:12 GMT 2025
    - Last Modified: Thu Nov 21 18:27:17 GMT 2024
    - 51.7K bytes
    - Click Count (0)
  5. github.com/golang/go

    src/cmd/asm/internal/asm/operand_test.go 

    	{"(R5)(R6*1)", "(R5)(R6*1)"},
	{"(R5+R6)", "(R5)(R6)"},
	{"-1(R4)", "-1(R4)"},
	{"-1(R5)", "-1(R5)"},
	{"6(PC)", "6(PC)"},
	{"CR7", "CR7"},
	{"CTR", "CTR"},
	{"VS0", "VS0"},
	{"VS1", "VS1"},
	{"VS2", "VS2"},
	{"VS3", "VS3"},
	{"VS4", "VS4"},
	{"VS5", "VS5"},
	{"VS6", "VS6"},
	{"VS7", "VS7"},
	{"VS8", "VS8"},
	{"VS9", "VS9"},
	{"VS10", "VS10"},
	{"VS11", "VS11"},
	{"VS12", "VS12"},
    Created: Tue Dec 30 11:13:12 GMT 2025
    - Last Modified: Tue Aug 29 18:31:05 GMT 2023
    - 23.9K bytes
    - Click Count (0)
  6. github.com/golang/go

    lib/fips140/v1.0.0-c2097c7c.zip 

    done MOVBZ (MASK_PTR)(R16), R14 MOVBZ (BLK_INP)(R16), R15 XOR R14, R15, R14 MOVB R14, (R16)(BLK_OUT) #endif done: // Save the updated counter value P8_STXVB16X(V30, COUNTER, R0) // Clear the keys XXLXOR VS0, VS0, VS0 XXLXOR VS1, VS1, VS1 XXLXOR VS2, VS2, VS2 XXLXOR VS3, VS3, VS3 XXLXOR VS4, VS4, VS4 XXLXOR VS5, VS5, VS5 XXLXOR VS6, VS6, VS6 XXLXOR VS7, VS7, VS7 XXLXOR VS8, VS8, VS8 XXLXOR VS9, VS9, VS9 XXLXOR VS10, VS10, VS10 XXLXOR VS11, VS11, VS11 XXLXOR VS12, VS12, VS12 XXLXOR VS13, VS13, VS13 XXLXOR...
    Created: Tue Dec 30 11:13:12 GMT 2025
    - Last Modified: Thu Sep 25 19:53:19 GMT 2025
    - 642.7K bytes
    - Click Count (0)
  7. github.com/golang/go

    lib/fips140/v1.1.0-rc1.zip 

    done MOVBZ (MASK_PTR)(R16), R14 MOVBZ (BLK_INP)(R16), R15 XOR R14, R15, R14 MOVB R14, (R16)(BLK_OUT) #endif done: // Save the updated counter value P8_STXVB16X(V30, COUNTER, R0) // Clear the keys XXLXOR VS0, VS0, VS0 XXLXOR VS1, VS1, VS1 XXLXOR VS2, VS2, VS2 XXLXOR VS3, VS3, VS3 XXLXOR VS4, VS4, VS4 XXLXOR VS5, VS5, VS5 XXLXOR VS6, VS6, VS6 XXLXOR VS7, VS7, VS7 XXLXOR VS8, VS8, VS8 XXLXOR VS9, VS9, VS9 XXLXOR VS10, VS10, VS10 XXLXOR VS11, VS11, VS11 XXLXOR VS12, VS12, VS12 XXLXOR VS13, VS13, VS13 XXLXOR...
    Created: Tue Dec 30 11:13:12 GMT 2025
    - Last Modified: Thu Dec 11 16:27:41 GMT 2025
    - 663K bytes
    - Click Count (0)
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