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tensorflow/compiler/mlir/tensorflow/tests/canonicalize.mlir
%3 = "tf.AddV2"(%arg1, %0) : (tensor<4xf32>, tensor<4xf32>) -> tensor<4xf32> %4 = "tf.AddV2"(%0, %arg1) : (tensor<4xf32>, tensor<4xf32>) -> tensor<4xf32> // CHECK: %[[CONST:.*]] = "tf.Const"() // CHECK-DAG: %[[ADD1:.*]] = "tf.AddV2"(%arg0, %[[CONST]]) // CHECK-DAG: %[[ADD2:.*]] = "tf.AddV2"(%arg0, %[[CONST]]) // CHECK: return %[[ADD1]], %[[ADD2]], %arg1, %arg1
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 09 22:07:10 UTC 2024 - 132.1K bytes - Viewed (0) -
tensorflow/compiler/mlir/tf2xla/tests/legalize-tf-communication.mlir
// CHECK: [[SEND_TOKEN:%.*]] = "mhlo.send"([[ARG1]], [[INIT_TOKEN]]) "tf.XlaSendToHost"(%arg1) {key = "send_key"} : (tensor<f32>) -> () // CHECK: mhlo.return [[ARG1]], [[SEND_TOKEN]] "mhlo.return"(%arg1) : (tensor<f32>) -> () // CHECK-NEXT: }, { }, { // CHECK: mhlo.return [[ARG1]], [[INIT_TOKEN]] "mhlo.return"(%arg1) : (tensor<f32>) -> ()
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Feb 08 18:24:20 UTC 2024 - 38.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/mark_input_output_aliases.mlir
// CHECK-LABEL: func @device_func_3 // CHECK-NOT: tf.aliasing_output func.func @device_func_3(%arg0: tensor<f32>, %arg1: tensor<f32>) -> (tensor<f32>, tensor<f32>) { func.return %arg1, %arg0 : tensor<f32>, tensor<f32> } // CHECK-LABEL: func @skip_multiple_reads_of_resource func.func @skip_multiple_reads_of_resource(%arg0: !tf_res_f32, %arg1: !tf_res_f32) { %0 = "tf.ReadVariableOp"(%arg0) : (!tf_res_f32) -> tensor<f32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Mar 05 04:14:26 UTC 2024 - 6.4K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/legalize-tf.mlir
^bb0(%arg0: tensor<8x16xi16>, %arg1: tensor<8x16xi16>): %0 = "tf.FloorDiv"(%arg0, %arg1) : (tensor<8x16xi16>, tensor<8x16xi16>) -> tensor<8x16xi16> func.return %0 : tensor<8x16xi16> // CHECK-LABEL: floor_div_i16 // CHECK: tfl.floor_div %arg0, %arg1 : tensor<8x16xi16> // CHECK: return } func.func @not_equal(%arg0: tensor<8x16xf32>, %arg1: tensor<8x16xf32>) -> tensor<8x16xi1> {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Jun 05 01:54:33 UTC 2024 - 153.4K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/tpu-resource-read-for-write.mlir
// CHECK-SAME: ([[ARG0:%.*]]: tensor<i32>, [[ARG1:%.*]]: tensor<f32>, [[ARG2:%.*]]: tensor<*x!tf_type.resource<tensor<i32>>>) func.func @write_only_resource(%arg0: tensor<i32>, %arg1: tensor<f32>, %arg2: tensor<*x!tf_type.resource<tensor<i32>>>) { // CHECK-NEXT: [[READ:%.*]] = "tf.ReadVariableOp"([[ARG2]]) // CHECK-NEXT: [[CLUSTER:%.*]]:2 = "tf_device.cluster_func"([[ARG0]], [[ARG1]], [[READ]])
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 02 16:54:40 UTC 2024 - 5.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/tfrt_ops.mlir
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Feb 15 06:13:11 UTC 2024 - 1.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/shape-inference.mlir
// CHECK: "tfl.conv_2d"(%arg0, %arg1, %arg2) <{dilation_h_factor = 1 : i32, dilation_w_factor = 1 : i32, fused_activation_function = "NONE", padding = "SAME", stride_h = 2 : i32, stride_w = 2 : i32}> : (tensor<1x112x80x128xf32>, tensor<128x3x3x128xf32>, tensor<128xf32>) -> tensor<1x56x40x128xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 02 09:41:17 UTC 2024 - 11.5K bytes - Viewed (0) -
tensorflow/compiler/jit/rearrange_function_argument_pass_test.cc
// "then_branch"/"else_branch". // "arg0" (T=DT_RESOURCE), "arg1" (T=DT_BOOL) // "ret0" = "arg1" // "ret1" = "arg0" tensorflow::Scope s = tensorflow::Scope::NewRootScope(); Output arg0 = ops::_Arg(s.WithOpName("arg0"), DT_RESOURCE, 0); Output arg1 = ops::_Arg(s.WithOpName("arg1"), DT_BOOL, 1); auto ret0 = ops::_Retval(s.WithOpName("ret0"), arg1, 0); auto ret1 = ops::_Retval(s.WithOpName("ret1"), arg0, 1);
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri Feb 09 11:36:41 UTC 2024 - 10.5K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/convert_control_to_data_outputs.mlir
%stack_push:2 = tf_executor.island wraps "tf.StackPushV2"(%stack_handle#0, %arg1) : (!tf_res, tensor<f32>) -> tensor<f32> %add:2 = tf_executor.island wraps "tf.Add"(%arg1, %arg1) : (tensor<f32>, tensor<f32>) -> tensor<f32> %stack_push2:2 = tf_executor.island(%stack_push#1) wraps "tf.StackPushV2"(%stack_handle#0, %add#0) : (!tf_res, tensor<f32>) -> tensor<f32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Feb 22 18:35:00 UTC 2024 - 68.9K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/experimental/tac/tests/device-transform-gpu.mlir
func.func @avoidPackToConcatenationOnUnknownRank(%arg0: tensor<*xf32>, %arg1: tensor<*xf32>) -> tensor<*xf32> { %0 = "tfl.pack"(%arg0, %arg1) {axis = 0 : i32, values_count = 2 : i32} : (tensor<*xf32>, tensor<*xf32>) -> tensor<*xf32> func.return %0 : tensor<*xf32> } // CHECK-NOT: "tfl.reshape" // CHECK: "tfl.pack" // ----- func.func @squaredDifference(%arg0: tensor<4xf32>, %arg1: tensor<4xf32>) -> tensor<4xf32> {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 02 09:41:17 UTC 2024 - 15.6K bytes - Viewed (0)